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| CC2570 Datasheet, PDF (16/32 Pages) Texas Instruments – 1- and 8-Channel ANT™ RF Network Processors | |||
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CC2570
CC2571
SWRS095A â FEBRUARY 2011 â REVISED MARCH 2011
www.ti.com
BYTE-SYNCHRONOUS SERIAL INTERFACE
The byte-synchronous serial interface may be used in conjunction with an SPI (three-wire) peripheral on a host
MCU. Additional control lines are used to control the power states and flow of the data. The CC257x always acts
as the SPI master in the interface. To select the byte-synchronous serial interface, the PORTSEL pin must be set
to VCC and the SFLOW pin must be set to GND. This is illustrated in Figure 12.
C208
Vcc
C200
C201
X3
C209
Vcc
C202
R200
C203
Vcc
C211
Host MCU
SOUT
SIN
SCLK
Vcc
C204
1 GND
2 GND
3 GND
4 GND
5 TxD/SOUT
6 RxD/SIN
7 BR2/SCLK
8 BR1/SFLOW
9 BR3/FAST SPI
10 DVDD2
U200
CC257X
R_BIAS 30
AVDD4 29
AVDD1 28
AVDD2 27
RF_N 26
RF_P 25
AVDD3 24
XOSC_Q2 23
XOSC_Q1 22
AVDD5 21
X201
X200
Vcc
C205
L204
X203
L204
L202
X202
Vc c
C210
L203
Antenna
X207
X208
Host MCU
SEN
MRDY
SRDY
RESET
C206
X1
1
2
C207
Byte Synchronous Mode
Figure 12. Byte-Synchronous Serial Hardware Setup
S0506-01
The speed of the SPI clock can be set to either 500 kHz or 4 MHz by setting FAST SPI (pin 9) as specified in
Table 3.
Table 3. Byte-Synchronous Clock Speed Selection
FAST SPI (Pin 9)
HIGH
LOW
SPI CLK Speed
4 MHz
500 kHz
16
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Copyright © 2011, Texas Instruments Incorporated
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