CC2570 Datasheet, PDF (12/32 Pages) Texas Instruments – 1- and 8-Channel ANT™ RF Network Processors

CC2570
CC2571
SWRS095A – FEBRUARY 2011 – REVISED MARCH 2011
www.ti.com
PIN
NAME
DCOUPL
DVDD1
DVDD2
EE_CLK
EE_CS
EE_GND
EE_MISO
EE_MOSI
GND
NO.
40
39
10
16
12
34
14
15
1, 2, 3, 4,
13, 17, 35,
37, 38
PORTSEL
36
R_BIAS
30
RESET
20
RF_N
26
RF_P
25
RTS/SEN
11
RxD/SIN
6
SLEEP/MRDY
18
SUSPEND/SRDY
19
TxD/SOUT
5
XOSC32K_Q1
32
XOSC32K_Q2
33
XOSC_Q1
22
XOSC_Q2
23
PIN FUNCTIONS (continued)
DIRECTION
DESCRIPTION
OUT
OUT
OUT
IN
OUT
N/A
IN/IN
I
EEPROM SPI master clock
EEPROM SPI chip select
EEPROM ground
EEPROM SPI master in
EEPROM SPI master out
Ground
PORTSEL: Configuration pin to select synchronous or asynchronous serial
communication
Reset signal
OUT/OUT
OUT/OUT
IN/IN
IN/IN
OUT/OUT
Digital output for serial communication
Synchronous: SEN (Serial-enable flow control)
Asynchronous: RTS (UART flow control)
Digital input for serial communication
Synchronous: SIN (SPI master in)
Asynchronous: RxD (UART receive)
Serial communication pin
Synchronous: MRDY (message-ready flow control signal)
Asynchronous: SLEEP (sleep assert)
Serial communication pin
Synchronous: SRDY (bit- or byte-ready flow control)
Asynchronous: SUSPEND (suspend signal)
Digital output for serial communication
Synchronous: SOUT (SPI master out)
Asynchronous: TxD (UART transmit)
SERIAL INTERFACE
The CC257x supports various serial interfaces to accommodate almost any application requirements. These
include asynchronous, byte synchronous, and bit synchronous (bit bashing). The serial interface is selected by
using external configuration pins, as described in Table 1. Because these pins are sampled by the CC257x on
startup to determine serial interface, it is important that these pins retain their state while powered up. Changing
the state of these pins after start-up may result in undefined behavior.
Serial Mode
Asynchronous
Byte synchronous
Bit synchronous
Table 1. Serial Interface Selection
PORTSEL (Pin 36)
0
1
1
SFLOW (Pin 8)
X
0
1
12
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