THS1031CPW Datasheet, PDF(15/41 Page) Texas Instruments – 3-V TO 5.5-V, 10-BIT, 30 MSPS CMOS ANALOG-TO-DIGITAL CONVERTER

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THS1031CPW Datasheet, PDF (15/41 Pages) Texas Instruments – 3-V TO 5.5-V, 10-BIT, 30 MSPS CMOS ANALOG-TO-DIGITAL CONVERTER

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THS1031

3-V TO 5.5-V, 10-BIT, 30 MSPS

CMOS ANALOG-TO-DIGITAL CONVERTER

SLAS242E â NOVEMBER 1999 â REVISED MARCH 2002

PRINCIPLES OF OPERATION

complete system (continued)

The REFTF and REFBF voltage difference and the gain sets the device input range. The next sections describe

in detail the various methods available for setting voltages REFTF and REFBF to obtain the desired input span

and device performance.

ADC reference generation

The THS1031 has three primary modes of ADC reference generation, selected by the voltage level applied to

the MODE pin.

Connecting the MODE pin to AGND gives full external reference mode. In this mode, the user supplies the ADC

reference voltages directly to pins REFTF and REFBF. This mode is used where there is need for minimum

power drain or where there are very tight tolerances on the ADC reference voltages. This mode also offers the

possibility of Kelvin connection of the reference inputs to the THS1031 to eliminate any voltage drops from

remote references that may occur in the system. Only single-ended input is possible in this mode.

Connecting the MODE pin to AVDD/2 gives differential mode. In this mode, the ADC reference voltages REFTF

and REFBF are generated by the internal reference buffer from the voltage applied to the VREF pin. This mode

is suitable for handling differentially presented inputs, which are applied to the AIN and REFTS/REFBS pins.

A special case of differential mode is center span mode, in which user applies a single-ended signal to AIN and

applies the mid-scale input voltage (VM) to the REFTS and REFBS pins.

Connecting the MODE pin to AVDD gives top/bottom mode. In this mode, the ADC reference voltages REFTF

and REFBF are generated by the internal reference buffer from the voltages applied to the REFTS and REFBS

pins. Only single-ended input is possible in top/bottom mode.

Table 1. Typical Set of Reference Connections

REFERENCE MODE

MODE

External

AVSS

Internal

AVDD/2

External (through internal

reference buffer)

Output of VREF can be

externally tied to REFTS or

REFBS to provide one of the

reference voltages

AVDD

REFSENSE

VREF

VOLTAGE

AVDD

VREF

AGND

External

divider

AVDD

VREF

AGND

External

divider

Disabled

1 + Ra/Rb

(see Figure 22)

Disabled

1 + Ra/Rb

(see Figure 22)

REFTS, REFBS

ANALOG INPUT FIGURES

Reference buffer powered

down, reference voltage pro-

vided directly by REFTS and

REFBS

Single-ended

12, 13, 14

Externally connect REFTS

to REFBS. This pair then

forms AINâ to the ADC.

Differential or

center span

15, 16, 17

REFTS = VMID + (VFS+ â

VFSâ) Ã Gain/2

REFBS = VMID â (VFS+ â

VFSâ) Ã Gain/2

Single-ended

(top-bottom

mode)

18, 19

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