TCM29C13 Datasheet, PDF (15/25 Pages) Texas Instruments – COMBINED SINGLE-CHIP PCM CODEC AND FILTER

TCM29C13, TCM29C14, TCM29C16, TCM29C17,
TCM129C13, TCM129C14, TCM129C16, TCM129C17
COMBINED SINGLE-CHIP PCM CODEC AND FILTER
SCTS011H – APRIL 1986 – REVISED JULY 1996
PARAMETER MEASUREMENT INFORMATION
Time-Slot 1
CLKX
FSX Input
(nonsignaling
frames)
FSX Input
(signaling
frames)
CLKX
tpd1
PCM OUT
1
2
3
4
5
6
7
8
td(FSX)
tr
tf
tw(CLK)
tc(CLK)
td(FSX)
td(FSX)
1
2
Bit 1†
FRAME SYNCHRONIZATION TIMING
Time-Slot N
3
tpd2
Bit 2
4
Bit 3
5
Bit 4
6
Bit 5
7
Bit 6
8
tpd3
Bit 7 Bit 8†
TSX Output
SIGX Input
tpd4
Don’t Care
tsu(SIGX)
tpd5
Valid
th(SIGX)
Don’t Care
OUTPUT TIMING
Figure 3. Transmit Timing (Fixed-Data Rate)
CLKR
Time-Slot 1
1
2
3
4
5
6
7
FSR
(nonsignaling
frames)
FSR
(signaling
frames)
td(FSR)
td(FSR)
tr
tf
td(FSR)
tw(CLK)
tc(CLK)
FRAME SYNCHRONIZATION TIMING
CLKR
1
tsu(PCM _IN)
PCM IN
SIGR Output
Bit 1†
Valid
2
3
th(PCM _IN)
Bit 2
Valid
Bit 3
Valid
Time-Slot N
4
5
Bit 4
Valid
Valid
Bit 5
Valid
6
Bit 6
Valid
7
8
tpd6
Bit 7
Valid
Bit 8†
Valid
INPUT TIMING
8
Valid
Figure 4. Receive Timing (Fixed-Data Rate)
† _{Bit 1 = MSB = sign bit and is clocked in first on PCM IN or clocked out first on PCM OUT. Bit 8 = LSB = least significant bit and is clocked in last}
on PCM IN or is clocked out last on PCM OUT.
NOTE A: Inputs are driven from 0.45 V to 2.4 V. Time intervals are referenced to 2 V if the high level is indicated and 0.8 V if the low level is
indicated.
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