TMS320C6424_1 Datasheet, PDF (142/245 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

TMS320C6424
Fixed-Point Digital Signal Processor
SPRS347B – MARCH 2007 – REVISED NOVEMBER 2007
www.ti.com
6.4.1 EDMA3 Channel Synchronization Events
The EDMA supports up to 64 EDMA channels which service peripheral devices and external memory.
Table 6-6 lists the source of EDMA synchronization events associated with each of the programmable
EDMA channels. For the C6424 device, the association of an event to a channel is fixed; each of the
EDMA channels has one specific event associated with it. These specific events are captured in the
EDMA event registers (ER, ERH) even if the events are disabled by the EDMA event enable registers
(EER, EERH). For more detailed information on the EDMA module and how EDMA events are enabled,
captured, processed, linked, chained, and cleared, etc., see the TMS320C642x DSP Enhanced DMA
(EDMA) Controller User's Guide (literature number SPRUEM5).
Table 6-6. C6424 EDMA Channel Synchronization Events⁽¹⁾
EDMA
CHANNEL
0-1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16-21
22
23
24
25
26
27
28
29
30-31
32
33
34
35
36
37
38
39
40
41
EVENT NAME
–
XEVT0
REVT0
XEVT1
REVT1
–
–
–
–
AXEVTE0
AXEVTO0
AXEVT0
AREVTE0
AREVTO0
AREVT0
–
URXEVT0
UTXEVT0
URXEVT1
UTXEVT1
–
–
ICREVT
ICXEVT
–
GPINT0
GPINT1
GPINT2
GPINT3
GPINT4
GPINT5
GPINT6
GPINT7
GPBNKINT0
GPBNKINT1
EVENT DESCRIPTION
Reserved
McBSP0 Transmit Event
McBSP0 Receive Event
McBSP1 Transmit Event
McBSP1 Receive Event
Reserved
Reserved
Reserved
Reserved
McASP0 Transmit Event Even
McASP0 Transmit Event Odd
McASP0 Transmit Event
McASP0 Receive Event Even
McASP0 Receive Event Odd
McASP0 Receive Event
Reserved
UART 0 Receive Event
UART 0 Transmit Event
UART 1 Receive Event
UART 1 Transmit Event
Reserved
Reserved
I2C Receive Event
I2C Transmit Event
Reserved
GPIO 0 Interrupt
GPIO 1 Interrupt
GPIO 2 Interrupt
GPIO 3 Interrupt
GPIO 4 Interrupt
GPIO 5 Interrupt
GPIO 6 Interrupt
GPIO 7 Interrupt
GPIO Bank 0 Interrupt
GPIO Bank 1 Interrupt
(1) In addition to the events shown in this table, each of the 64 channels can also be synchronized with the transfer completion or alternate
transfer completion events. For more detailed information on EDMA event-transfer chaining, see the TMS320C642x DSP Enhanced
DMA (EDMA) Controller User's Guide (literature number SPRUEM5).
142 Peripheral Information and Electrical Specifications
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