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TMS320C6424_1 Datasheet, PDF (129/245 Pages) Texas Instruments – Fixed-Point Digital Signal Processor
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5.2 Recommended Operating Conditions(1)
TMS320C6424
Fixed-Point Digital Signal Processor
SPRS347B – MARCH 2007 – REVISED NOVEMBER 2007
MIN
NOM
MAX UNIT
CVDD
Supply voltage, Core (CVDD) (2)
(-6, -5, -5Q, -5S, -4, -4Q,
-4S devices)
(-6 devices)(3)
1.14
1.2
1.0
1.05
1.26
V
1.1
V
DVDD
VSS
DDR_VREF
DDR_ZP
DDR_ZN
Supply voltage, I/O, 3.3V (DVDD33)
Supply voltage, I/O, 1.8V (DVDDR2, DDR_VDDDLL, PLLPWR18,
MXVDD (4))
Supply ground (VSS, DDR_VSSDLL, MXVSS(5))
DDR2 reference voltage(6)
DDR2 impedance control, connected via 200 Ω resistor to VSS
DDR2 impedance control, connected via 200 Ω resistor to DVDDR2
High-level input voltage, 3.3V (except PCI-capable and I2C pins)
2.97
1.71
0
0.49DVDDR2
2
3.3
1.8
0
0.5DVDDR2
VSS
DVDDR2
3.63
V
1.89
V
0
V
0.51DVDDR2
V
V
V
V
High-level input voltage, MXI/ CLKIN
VIH
High-level input voltage, PCI
0.65MXVDD
0.5DVDD33
High-level input voltage, I2C
0.7DVDD33
Low-level input voltage, 3.3V (except PCI-capable and I2C pins)
V
DVDD33 + 0.5
V
0.8
V
Low-level input voltage, MXI/ CLKIN
VIL
Low-level input voltage, PCI
Low-level input voltage, I2C
Commercial
TJ
Operating Junction temperature(7)(8)
Automotive (Q or S suffix)
–0.5
0
0
–40
0.35MXVDD
V
0.3DVDD33
V
0.3DVDD33
V
90 °C
125 °C
Commercial
0
TA
Operating Ambient temperature(8)
Automotive (Q or S suffix)
-40
70 °C
85 °C
(-6 devices, 1.2 V)
600 MHz
FSYSCLK1
DSP Operating Frequency
(SYSCLK1)
(-6 devices, 1.05 V)(3)
(-5, -5Q, -5S devices)
400 MHz
500 MHz
(-4, -4Q, -4S devices)
400 MHz
(1) The actual voltage must be determined at device power-up, and not be changed dynamically during run-time.
(2) Future variants of TI SoC devices may operate at voltages ranging from 0.9 V to 1.4 V to provide a range of system power/performance
options. TI highly recommends that users design-in a supply that can handle multiple voltages within this range (i.e., 1.0 V, 1.05 V,
1.1 V, 1.14 V, 1.2 V, 1.26 V with ± 3% tolerances) by implementing simple board changes such as reference resistor values or input pin
configuration modifications. Not incorporating a flexible supply may limit the system's ability to easily adapt to future versions of TI SoC
devices.
(3) 1.05 V CVDD is only supported on -6 devices running at SYSCLK1 ≤ 400 MHz.
(4) Oscillator 1.8 V power supply (MXVDD) can be connected to the same 1.8 V power supply as DVDDR2.
(5) Oscillator ground (MXVSS) must be kept separate from other grounds and connected directly to the crystal load capacitor ground.
(6) DDR_VREF is expected to equal 0.5DVDDR2 of the transmitting device and to track variations in the DVDDR2.
(7) In the absence of a heat sink or direct thermal attachment on the top of the device, use the following formula to determine the device
junction temperature: TJ = TC + (Power x PsiJT). Power and TC can be measured by the user. Section 7.1, Thermal Data for ZWT and
Section 7.1.1, Thermal Data for ZDU provide the junction-to-package top (PSIJT) value based on airflow in the system. In the presence
of a heat sink or direct thermal attachment on the top of the device, additional calculations and considerations must be taken into
account. For more detailed information on thermal considerations, measurements, and calculations, see the Thermal Considerations for
the DM64xx, DM64x, and C6000 Devices Application Report (literature number SPRAAL9).
(8) Applications must meet both the Operating Junction Temperature and Operating Ambient Temperature requirements. For more detailed
information on thermal considerations, measurements, and calculations, see the Thermal Considerations for the DM64xx, DM64x, and
C6000 Devices Application Report (literature number SPRAAL9).
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Device Operating Conditions 129