TMS320C5514_1 Datasheet, PDF (138/144 Pages) Texas Instruments – TMS320C5514 Fixed-Point Dight Signal Processor

TMS320C5514
SPRS646A – JANUARY 2010 – REVISED MARCH 2010
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6.18.3 GPIO Peripheral Input Latency Electrical Data/Timing
Table 6-51. Timing Requirements for GPIO Input Latency⁽¹⁾
NO.
1 t_L(GPI) Latency, GP[x] input
Polling GPIO_DIN register
Polling GPIO_IFR register
Interrupt Detection
CV_DD = 1.05 V
CV_DD = 1.3 V
MIN
MAX
5
7
8
UNIT
cyc
cyc
cyc
(1) The pulse width given is sufficient to generate a CPU interrupt. However, if a user wants to have the device recognize the GP[x] input
changes through software polling of the GPIO register, the GP[x] input duration must be extended to allow device enough time to access
the GPIO register through the internal bus.
138 Peripheral Information and Electrical Specifications
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