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TMS320DM642 Datasheet, PDF (132/178 Pages) Texas Instruments – Video/Imaging Fixed-Point Digital Signal Processor
TMS320DM642
Video/Imaging Fixed-Point Digital Signal Processor
SPRS200J – JULY 2002 – REVISED AUGUST 2005
Table 5-44. Timing Requirements for PCI Inputs (see Figure 5-48)
www.ti.com
NO.
4
tsu(IV-PCLKH)
5
th(IV-PCLKH)
Setup time, input valid before PCLK high
Hold time, input valid after PCLK high
–500, A-600
33 MHz
MIN MAX
7
0
–600
–720
66 MHz
MIN MAX
3
0
UNIT
ns
ns
PCLK
4
5
PCI Input
Inputs Valid
Figure 5-48. PCI Input Timing (33-/66-MHz)
Table 5-45. Switching Characteristics Over Recommended Operating Conditions for PCI Outputs
(see Figure 5-49)
NO.
1
td(PCLKH-OV)
2
td(PCLKH-OLZ)
3
td(PCLKH-OHZ)
parameter
Delay time, PCLK high to output valid
Delay time, PCLK high to output low impedance
Delay time, PCLK high to output high impedance
–500, A-600
33 MHz
MIN MAX
2
11
2
28
–600
–720
66 MHz
MIN MAX
2
6
2
14
UNIT
ns
ns
ns
PCLK
1
1
PCI Output
2
3
Figure 5-49. PCI Output Timing (33-/66-MHz)
132 DM642 Peripheral Information and Electrical Specifications