DAC39J84_15 Datasheet, PDF (117/146 Pages) Texas Instruments – DAC39J84 Quad-Channel, 16-Bit, 2.8 GSPS, Digital-to-Analog Converter with 12.5 Gbps JESD204B Interface

www.ti.com
7.5.1.102 config101 Register – Address: 0x65, Default: 0x0000
DAC39J84
SLASE48A – NOVEMBER 2014 – REVISED JANUARY 2015
15
7
Register
Name
config101
WRITE TO
CLEAR
Addr
(Hex)
0x65
Figure 183. config101 Register Format
14
13
6
5
Not Used
12
11
alarm_l_ error(1)
4
3
10
9
2
1
alarm_fifo_ flags(0)
Table 132. config101 Register Field Descriptions
Bit Name
Function
15:8 alarm_l_ error(1)
Lane0 errors:
bit15 = multiframe alignment error
bit14 = frame alignment error
bit13 = link configuration error
bit12 = elastic buffer overflow (bad RBD value)
bit11 = elastic buffer match error. The first non-/K/ doesn’t match
“match_ctrl” and “match_data” programmed values.
bit10 = code synchronization error
bit9 = 8b/10b not-in-table code error
bit8 = 8b/10b disparity error
7:4 Not Used
Not Used
3:0 alarm_fifo_ flags(0) Lane0 FIFO errors:
bit3 = write_error : Asserted if write request and FIFO is full
bit2 = write_full : FIFO is FULL
bit1 = read_error : Asserted if read request with empty FIFO
bit0 = read_empty : FIFO is empty
8
0
Default
Value
0x00
0000
0000
7.5.1.103 config102 Register – Address: 0x66, Default: 0x0000
Figure 184. config102 Register Format
15
14
13
12
11
10
9
8
alarm_lane_ error(2)
7
6
5
4
3
2
1
0
reserved
alarm_fifo_ flags(0)
Register
Name
config102
WRITE
TO
CLEAR
Addr
(Hex)
0x66
Table 133. config102 Register Field Descriptions
Bit Name
15:8 alarm_lane_
error(2)
7:4 reserved
3:0 alarm_fifo_
flags(0)
Function
Lane0 errors:
bit15 = multiframe alignment error
bit14 = frame alignment error
bit13 = link configuration error
bit12 = elastic buffer overflow (bad RBD value)
bit11 = elastic buffer match error. The first non-/K/ doesn’t match
“match_ctrl” and “match_data” programmed values.
bit10 = code synchronization error
bit9 = 8b/10b not-in-table code error
bit8 = 8b/10b disparity error
Reserved
Lane0 FIFO errors:
bit3 = write_error : Asserted if write request and FIFO is full
bit2 = write_full : FIFO is FULL
bit1 = read_error : Asserted if read request with empty FIFO
bit0 = read_empty : FIFO is empty
Default
Value
0x00
0000
0000
Copyright © 2014–2015, Texas Instruments Incorporated
Product Folder Links: DAC39J84
Submit Documentation Feedback 117