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SN74AUP1G74 Datasheet, PDF (11/17 Pages) Texas Instruments – LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
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SN74AUP1G74
LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH CLEAR AND PRESET
SCES644A – MARCH 2006 – REVISED SEPTEMBER 2006
PARAMETER MEASUREMENT INFORMATION
(Propagation Delays, Setup and Hold Times, and Pulse Width)
From Output
Under Test
CL
(see Note A)
1 MΩ
LOAD CIRCUIT
VCC = 0.8 V
VCC = 1.2 V
± 0.1 V
VCC = 1.5 V
± 0.1 V
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
CL 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF
VM
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VI
VCC
VCC
VCC
VCC
VCC
VCC
Input
VI
VM
VM
0V
tPLH
Output
VM
tPHL
VM
VOH
VOL
tPHL
tPLH
Output
VOH
VM
VM
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Input
Timing Input
Data Input
tw
VCC/2
VCC
VCC/2
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VCC
VCC/2
0V
tsu
th
VCC/2
VCC
VCC/2
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr/tf = 3 ns.
C. The outputs are measured one at a time, with one transition per measurement.
D. tPLH and tPHL are the same as tpd.
E. All parameters and waveforms are not applicable to all devices.
Figure 3. Load Circuit and Voltage Waveforms
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