SN74AUP1G74 Datasheet, PDF (1/17 Pages) Texas Instruments – LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

www.ti.com
SN74AUP1G74
LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH CLEAR AND PRESET
SCES644A – MARCH 2006 – REVISED SEPTEMBER 2006
FEATURES
• Available in the Texas Instruments
NanoStar™ and NanoFree™ Packages
• Low Static-Power Consumption:
I_CC = 0.9 µA Max
• Low Dynamic-Power Consumption:
C_pd = 4.3 pF Typ at 3.3 V
• Low Input Capacitance: C_i = 1.5 pF Typ
• Low Noise – Overshoot and Undershoot
<10% of V_CC
• I_off Supports Partial-Power-Down Mode
Operation
• Schmitt-Trigger Action Allows Slow Input
Transition and Better Switching Noise
Immunity at the Input (V_hys = 250 mV Typ at
3.3 V)
• Wide Operating V_CC Range of 0.8 V to 3.6 V
• Optimized for 3.3-V Operation
• 3.6-V I/O Tolerant to Support Mixed-Mode
Signal Operation
• t_pd = 4.3 ns Max at 3.3 V
• Suitable for Point-to-Point Applications
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model
(A114-B, Class II)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
• ESD Protection Exceeds ±5000 V With
Human-Body Model
DCT PACKAGE
(TOP VIEW)
DCU PACKAGE
(TOP VIEW)
YEP OR YZP PACKAGE
(BOTTOM VIEW)
CLK
1
D
2
Q
3
8
V_CC
7
PRE
6
CLR
CLK 1
D2
Q3
GND 4
8
V_CC
7 PRE
6 CLR
5Q
GND 4 5 Q
Q ^{3 6} CLR
D ² 7 PRE
CLK
1 8 _VCC
GND
4
5
Q
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable
applications. This family ensures a very low static- and dynamic-power consumption across the entire V_CC range
of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal
integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).
T_A
–40°C to 85°C
ORDERING INFORMATION
PACKAGE ⁽¹⁾
ORDERABLE PART NUMBER TOP-SIDE MARKING⁽²⁾
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YEP
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
Reel of 3000
Reel of 3000
SN74AUP1G74YEPR
SN74AUP1G74YZPR
_ _ _HS_
SSOP – DCT
Reel of 3000 SN74AUP1G74DCTR
H74_ _ _
VSSOP – DCU
Reel of 3000 SN74AUP1G74DCUR
H74_
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006, Texas Instruments Incorporated