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SN74ALVC7805 Datasheet, PDF (11/14 Pages) Texas Instruments – 256 × 18 LOW-POWER CLOCKED FIRST-IN, FIRST-OUT MEMORY
SN74ALVC7805
256 × 18
LOW-POWER CLOCKED FIRST-IN, FIRST-OUT MEMORY
SCAS593A – OCTOBER 1997 – REVISED APRIL 1998
operating characteristics, VCC = 3.3 V, TA = 25°C
PARAMETER
Cpd Power dissipation capacitance
Outputs enabled
TEST CONDITIONS
CL = 50 pF, f = 5 MHz
TYP UNIT
53 pF
From Output
Under Test
CL = 50 pF
(see Note A)
PARAMETER MEASUREMENT INFORMATION
500 Ω
500 Ω
6V
S1
Open
GND
PARAMETER
ten
tPZH
tPZL
tdis
tPHZ
tPLZ
tpd tPLH/tPHL
S1
GND
6V
GND
6V
Open
LOAD CIRCUIT FOR OUTPUTS
Timing
Input
Data
Input
3V
1.5 V
0V
tsu
1.5 V
th
3V
1.5 V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Input
(see Note C)
1.5 V
3V
1.5 V
0V
tPLH
Output
1.5 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
tPHL
1.5 V
VOH
VOL
tw
Input 1.5 V
3V
1.5 V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
Output
Control
(low-level
enabling)
tPZL
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
tPZH
1.5 V
tPLZ
1.5 V
tPHZ
1.5 V
3V
1.5 V
0V
3V
VOL + 0.3 V
VOL
VOH
VOH – 0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
Figure 5. Standard CMOS Outputs (FULL, EMPTY, HF, AF/AE)
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