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THC63LVD827 Datasheet, PDF (9/19 Pages) THine Electronics, Inc. – LOW POWER / SMALL PACKAGE / 24Bit COLOR LVDS TRANSMITTER
THC63LVD827_Rev.1.00_E
Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
tTCIP
tTCH
tTCL
tTS
tTH
tTCD
tTCOP
tLVT
tTOP1
tTOP0
Parameter
CLK IN Period(Fig4,5)
CLK IN High Time(Fig4,5)
CLK IN Low Time(Fig4,5)
TTL Data Setup to CLK IN(Fig4,5)
TTL Data Hold from CKL IN(Fig4,5)
CLK IN to TCLK+/-
Delay (Fig4,5)
MODE=L,DDR=H
Others
CLK OUT Period(Fig6)
LVDS Transition Time(Fig2)
Output Data
Position0 (Fig6)
Output Data
Position1 (Fig6)
Min.
5.75
0.35tTCIP
0.35tTCIP
0.8
0.8
9tTCIP+3.1
5tTCIP+3.1
5.75
-0.15
t--T----C---O----P-- – 0.15
7
Typ.
0.5tTCIP
0.5tTCIP
0.6
Max.
100
0.65tTCIP
0.65tTCIP
9tTCIP+8.0
5tTCIP+8.0
100
1.5
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
0.0
+0.15 ns
-t-T----C---O----P--
7
-t-T----C---O----P-- + 0.15
ns
7
tTOP6
Output Data
Position2 (Fig6)
2t--T----C---O----P-- – 0.15
7
2 -t-T----C---O----P--
7
2t--T----C---O----P-- + 0.15
ns
7
tTOP5
Output Data
Position3 (Fig6)
tTCOP =
5.75ns~15ns
3t--T----C---O----P-- – 0.15
7
3 -t-T----C---O----P--
7
3t--T----C---O----P-- + 0.15
ns
7
tTOP4
Output Data
Position4 (Fig6)
4t--T----C---O----P-- – 0.15
7
4 -t-T----C---O----P--
7
4t--T----C---O----P-- + 0.15
ns
7
tTOP3
Output Data
Position5 (Fig6)
5t--T----C---O----P-- – 0.15
7
5 -t-T----C---O----P--
7
5-t-T----C---O----P-- + 0.15
ns
7
tTOP2
Output Data
Position6 (Fig6)
6t--T----C---O----P-- – 0.15
7
6 -t-T----C---O----P--
7
6t--T----C---O----P-- + 0.15
ns
7
tTPLL Phase Lock Time(Fig3)
10.0 ms
DE input period (Fig3-1)
tDEINT Dual out mode only (MODE=L)
4tTCIP tTCIP*(2n)(a)
ns
DE High time (Fig3-1)
tDEH Dual-out mode only (MODE=L)
2tTCIP tTCIP*(2m)(a)
ns
DE Low time(Fig3-1)
tDEL
Dual-out mode only (MODE=L)
2tTCIP
ns
(a) Refer to Fig3-1 for details.
Copyright©2012 THine Electronics, Inc.
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THine Electronics, Inc.