THC63LVD827 Datasheet, PDF (10/19 Pages) THine Electronics, Inc. – LOW POWER / SMALL PACKAGE / 24Bit COLOR LVDS TRANSMITTER

THC63LVD827_Rev.1.00_E
AC Timing Diagrams
V_diff=(TA+)-(TA-)
80%
TA+
V_diff
5pF _100Ω
20%
TA-
LVDS Output Load
t_LVT
Fig2. LVDS Output Load and Transition Time
80%
20%
t_LVT
CLKIN
/PDWN
VIH
t_TPLL
TCLKx+/-
x=1,2
Fig3. PLL Lock Time
CLKIN
t_TCIP
t_DEINT
DE
t_DEH
t_DEL
Note: In dual-out mode (MODE=L),
the period between rising edges of DE (t_DEINT), high time of DE (t_DEH)
should always satisfy following equations.
t_DEH = tTCIP * (2m)
t_DEINT = tTCIP * (2n)
m, n =integer
Fig3-1. Dual OUT mode DE input timing
V_diff=0V
Copyright©2012 THine Electronics, Inc.
9/18
THine Electronics, Inc.