THC63LVD827 Datasheet, PDF (5/19 Pages) THine Electronics, Inc. – LOW POWER / SMALL PACKAGE / 24Bit COLOR LVDS TRANSMITTER

THC63LVD827_Rev.1.00_E
Pin Description (Continued)
Pin Name
Pin #
Type
Description
Reserved1
C3
IN
Must be tied to GND.
6bit / 8bit mode select.
6B/8B
F7
IN
H: 6bit mode (21bit mode),
L: 8bit mode (27bit mode).
DDR function is active when MODE = L (Dual-out mode).
DDRN
E9
IN
H: DDR (Double Edge input) function disable (Fig4).
L: DDR (Double Edge input) function enable (Fig5).
N/C
C2
Must be Open.
VCC
G3,G5
Power Power Supply Pins for digital circuitry.
IOVCC
G7
Power Power Supply Pin for IO inputs circuitry.
LVDSVCC
C5,D3
Power Power Supply Pins for LVDS Outputs.
PLLVCC
C7
Power Power Supply Pin for PLL circuitry.
GND
F3,G4,G6,C4,
E3,C6,D7
Ground
Ground Pins.
a: Setting the PRBS pin high enables the internal test pattern generator. It generates Pseudo-Random Bit Sequence of 2²³-1.
The generated PRBS is fed into input data latches, encoded and serialized into LVDS OUT.
This function is normally to be used for analyzing the signal integrity of the transmission channel
including PCB traces, connectors, and cables.
Copyright©2012 THine Electronics, Inc.
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THine Electronics, Inc.