THC7984 Datasheet, PDF (31/45 Pages) THine Electronics, Inc. – 10-bit 3-channel Video Signal Digitizer

THC7984_Rev.2.0_E
R1D[7:6] Reserved *Must be set to 01b for proper operation (Default value: 10b)
R1D[5:4] RGB DATA Output Drive Strength
Output pins: RED<9:0>, GREEN<9:0>, BLUE<9:0>
R1D[3:2] Sync Output Drive Strength
Output pins: SOGOUT, HSOUT, VSOUT, O/E FIELD
R1D[1:0] Clock Output Drive Strength
Output pins: DATACK
Bigger values mean stronger output drive strength.
* Output drive strength should be adjusted according to the load capacitance, the trance length on PCB, and the power
supply voltage of output buffer (VDD) .
* Clock output drive strength is stronger than others.
R1E[7:6] HSOUT Output Signal Select
Select a output signal from HSOUT-pin.
00: HO --- HSYNC generated from the HSYNC input, and synchronous with the PLL clock.
Output polarity (R13[2]) , Start Position (R14[7:0]) , and Pulse Width (R15[7:0]) can be selected by the register setting.
PLL parameter settings (R02 to R04) are necessary for normal output.
HO can be used as a reference of the image (RGB data) alignment.
01: Regenerated HSYNC --- HSYNC generated from the HSYNC input, and synchronous with the internal oscillator
clock (approximately 40 MHz) . The start position is delayed some internal oscillator clock cycles after the leading edge
of the HSYNC input, and the pulse width is approximately 1/16 of horizontal period. The polarity is selected by register
(R13[2]) . PLL parameter settings (R02 to R04) are unnecessary for normal output. It has jitter of several internal
oscillator clock cycles.
10b: Raw HSYNC --- Buffered signal of the HSYNC input.
11b: Filtered HSYNC --- The Raw Hsync’s pulse which is not relate to horizontal period is removed by the HSYNC
Filter (R1F[3:0].
< Output Signal from HSOUT>
Horizontal Period
Input VSYNC
HO
Regenerated HSYNC
Raw HSYNC
Filtered HSYNC
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