SM5964A Datasheet, PDF (5/30 Pages) SyncMOS Technologies,Inc – 8-Bit Micro-controller With 64KB ISP Flash & TWSI & PWM & 1KB RAM embedded

SyncMOS Technologies International, Inc.
SM5964A
MNEMONIC PDIP 40 pin
ALE
30
#PSEN
29
#EA
31
X1
19
X2
18
PQFP 44 Pin
27
26
29
15
14
8-Bit Micro-controller
With 64KB ISP Flash & TWSI & PWM & 1KB RAM embedded
PLCC 44 pin
Names and Functions
33
Address Latch Enable:
Output pulse for latching the low byte of the address during an
access to external memory. In normal operation, ALE is emitted
twice every machine cycle, and can be used for external timing or
clocking. Note that one ALE pulse is skipped during each access to
external data memory. Setting SFR SCONF.0 can disable ALE. With
this bit set, ALE will be active only during a MOVX instruction.
32
Program Store Enable:
The read strobe to external program memory. When executing code
from the external program memory, #PSEN is activated twice each
machine cycle, except that two #PSEN activations are skipped
during each access to external data memory. #PSEN is not activated
during fetches from internal program memory.
35
External Access Enable:
#EA must be externally held low to enable the device to fetch code
from external program memory locations. If #EA is held high, the
device executes from internal program memory.
21
Crystal 1:
Input to the inverting oscillator amplifier and input to the internal
clock generator circuits.
20
Crystal 2:
Output from the inverting oscillator amplifier.
Specifications subject to change without notice contact your sales representatives for the most recent information.
5
Ver 2.3 SM5964A 10/2006