SM8958B Datasheet, PDF (42/49 Pages) SyncMOS Technologies,Inc – 256 bytes SRAM as standard 8052

SM8958B
8-Bit Micro-controller
32KB Flash
& 1KB RAM embedded
11. Power Management Unit
Power management unit serves two power management modes, Idle and Power Down, for the users to do power
saving function.
Mnemonic: PCON
7
6
5
SMOD
-
-
Address: 87h
4
3
2
1
0
Reset
-
GF1 GF0
PD
IDLE 00h
GF1: General-purpose flag bit.
GF0: General-purpose flag bit.
PD: Power Down mode control bit. Setting this bit turning on the PD Mode.
PD bit is always read as 0
IDLE: Idle mode control bit. Setting this bit turning on the Idle Mode.
Idle bit is always read as 0
11.1 Idle mode
An instruction that sets PCON.0 causes that to be the last instruction executed before going into the idle mode, the
internal clock is gated off to the CPU but not to the interrupt, timer and serial port functions.
There are two ways to terminate the idle. Activation of any enabled interrupt will cause PCON.0 to be cleared by
hardware, terminating the idle mode. The interrupt will be serviced, and following RETI, the next instruction to be
executed will be the one following the instruction that put the device into idle. Another way to wake-up from idle is
to pull RESET high to generate internal hardware reset.
11.2 Power Down mode
An instruction that sets PCON.1 cause that to be the last instruction executed before going into the Power-Down
mode. In the power-down mode, the on-chip oscillator is stopped. The contents of on-chip RAM and SFRs are
maintained. Be carefully to keep RESET pin active for at least 10ms in order for a stable clock.
The SM8958B can be resumed from power-down state by RESET pin or external interrupt INT0/ INT1. When it is
woken-up by RESET, the program will execute from the address 0000H. When it is woken-up by INT0 or INT1, the
program will execute from the corresponding interrupt service routine.
To enable wake-up by external interrupt pins, the associated interrupt control register (EA, EX0/EX1) must be
configured correctly. Additionally, the control bit PDWUE in SCONF register must be enabled as well.
Mnemonic: SCONF
7
6
5
4
3
WDR
-
-
PDWUE
-
Address: BFh
2
1
0
Reset
-
OME
ALEI
02H
PDWUE: Power down wake-up enable bit.
Set 1 to enable wake-up from power-down state by external pin int0 or int1.
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M085
Ver D SM8958B 08/07/2015
- 42 -