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SMH4814 Datasheet, PDF (40/44 Pages) Summit Microelectronics, Inc. – Dual Feed Active-ORing Programmable Hot Swap Controller
CONFIGURATION REGISTERS (CONTINUED)
SMH4814
Preliminary Information
Register R12 – Write protect and Write lockout, feedback pin control settings.
Register R12
D7 D6 D5 D4 D3 D2 D1 D0
Action
0
0
-
-
-
-
-
- Not Used
-
-
0
-
-
-
-
- Set WP on Power-up (0-don’t set WP; 1-set WP)
-
-
1
-
-
-
-
- Set WP on Power-up (0-don’t set WP; 1-set WP)
-
-
-
0
-
-
-
-
Write Lockout = allows writes to the config or
memory)
-
-
-
1
-
-
-
-
Write Lockout = prevents writes to the config or
memory
-
-
-
-
0
-
-
- FBD enable = disable pin input
-
-
-
-
1
-
-
- FBD enable = enable pin input
-
-
-
-
-
0
-
- FBC enable = disable pin input
-
-
-
-
-
1
-
- FBC enable = enable pin input
-
-
-
-
-
-
0
- FBB enable = disable pin input
-
-
-
-
-
-
1
- FBB enable = enable pin input
-
-
-
-
-
-
-
0 FBA enable = disable pin input
-
-
-
-
-
-
-
1 FBA enable = enable pin input
Fault/Status Registers
The following tables describe the 24 bits within the Fault/Status Registers. When Bit 7 of Register 0x04 (Slave
address 1001) is low, then the data within these registers represents the real-time state of the part. When Bit 7 is
high, then these registers represent data that was latched at the time that the Fault occurred. There are three
Status/Fault Registers, accessed at slave address 1001 with address bit A8 set low, at word address 0x02-0x04.
Register 0x02 Description
Bit #
7
PUPD
6
PUPC
5
PUPB
4
PUPA
3
FBD
2
FBC
1
FBB
0
FBA
Regsiter 0x03 Description
Bit #
7
GATEB OFF
6
GATEA OFF
5
Over-Current
Fault
4
FET is ON
3
ENTS Fault
2
PD Fault
1
OV Fault
0
UV Fault
Regsiter 0x04
Bit #
7
6
5
4
3
2
1
0
Description
Fault Register is
Latched
Write Protect Status
reserved
reserved
FB Fault
reserved
reserved
reserved
Summit Microelectronics, Inc
2080 2.0 07/21/05
40