SMH4814 Datasheet, PDF (10/44 Pages) Summit Microelectronics, Inc. – Dual Feed Active-ORing Programmable Hot Swap Controller

SMH4814
Preliminary Information
I²C 2-WIRE SERIAL INTERFACE AC OPERATING CHARACTERISTICS – 100/400kHz
Over recommended operating conditions, unless otherwise noted. All voltages are relative to V_SS. See Figure 4
Timing Diagram.
Symbol Description
Conditions
100kHz
400kHz
Min Typ Max Min Typ Max Units
f_SCL
t_LOW
t_HIGH
t_BUF
SCL Clock Frequency
Clock Low Period
Clock High Period
Bus Free Time
0
4.7
4.0
Before New Transmission
- Note 1/
4.7
100 0
1.3
0.6
1.3
400 KHz
µs
µs
µs
t_SU:STA
Start Condition Setup Time
4.7
t_HD:STA Start Condition Hold Time
4.0
t_SU:STO Stop Condition Setup Time
4.7
t_AA
Clock Edge to Data Valid
SCL low to valid
SDA (cycle n)
0.2
0.6
0.6
0.6
3.5 0.2
µs
µs
µs
0.9 _µs
t_DH
Data Output Hold Time
SCL low (cycle n+1)
to SDA change
0.2
0.2
µs
t_R
t_F
t_SU:DAT
t_HD:DAT
TI
SCL and SDA Rise Time
SCL and SDA Fall Time
Data In Setup Time
Data In Hold Time
Noise Filter SCL and SDA
Note 1/
Note 1/
Noise suppression
1000
1000 ns
300
300 ns
250
150
ns
0
0
ns
100
100
ns
t_WR
Write Cycle Time
Memory Array
5
5
ms
Note: 1/ - Guaranteed by Design.
TIMING DIAGRAMS
t_R
SCL
t_SU:SDA
SDA _(IN)
SDA _(OUT)
t_F
t_HD:SDA
t_AA
t_HIGH
t_HD:DAT
t_LOW
t_SU:DAT
t_DH
t_SU:STO
t_{W R (For W rite Operation O nly)}
t_BUF
Figure 4 . Basic I²C serial interface timing diagram for the Bus Interface and Memory timing. The table above
lists the AC timing parameters. One bit of data is transferred during each clock pulse. Note that data must
remain stable when the clock is high.
Summit Microelectronics, Inc
2080 2.0 07/21/05
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