ST10F272 Datasheet, PDF (99/179 Pages) STMicroelectronics – 16-bit MCU with 256 Kbyte Flash memory and 20 Kbyte RAM

ST10F272
System reset
To ensure correct power-up reset with controlled supply current consumption, specially if
clock signal requires a long period of time to stabilize, an asynchronous hardware reset is
required during power-up. For this reason, it is recommended to connect the external R0-C0
circuit shown in Figure 30 to the RPD pin. On power-up, the logical low level on RPD pin
forces an asynchronous hardware reset when RSTIN is asserted low. The external pull-up
R0 will then charge the capacitor C0. Note that an internal pull-down device on RPD pin is
turned on when RSTIN pin is low, and causes the external capacitor (C0) to begin
discharging at a typical rate of 100-200µA. With this mechanism, after power-up reset, short
low pulses applied on RSTIN produce synchronous hardware reset. If RSTIN is asserted
longer than the time needed for C0 to be discharged by the internal pull-down device, then
the device is forced in an asynchronous reset. This mechanism insures recovery from very
catastrophic failure.
Figure 30. Minimum external reset circuitry
RSTOUT
External Hardware
RSTIN
+
C1
a) Hardware
Reset
V_CC
R0
RPD
ST10F272
+
C0
b) For Power-up
Reset
(and Interruptible
Power Down
mode)
The minimum reset circuit of Figure 30 is not adequate when the RSTIN pin is driven from
the ST10F272 itself during software or watchdog triggered resets, because of the capacitor
C1 that will keep the voltage on RSTIN pin above V_IL after the end of the internal reset
sequence, and thus will trigger an asynchronous reset sequence.
Figure 31 shows an example of a reset circuit. In this example, R1-C1 external circuit is only
used to generate power-up or manual reset, and R0-C0 circuit on RPD is used for power-up
reset and to exit from Power Down mode. Diode D1 creates a wired-OR gate connection to
the reset pin and may be replaced by open-collector Schmitt trigger buffer. Diode D2
provides a faster cycle time for repetitive power-on resets.
R2 is an optional pull-up for faster recovery and correct biasing of TTL Open Collector
drivers.
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