AN966 Datasheet, PDF (9/21 Pages) STMicroelectronics – The front-end stage of conventional off-line converters

AN966 APPLICATION NOTE
quency inductor current ripple (twice the average line current, see fig. 9). The worst conditions will occur
on the peak of the minimum rated input voltage.
The maximum high frequency voltage ripple is usually imposed between 1% and 10% of the minimum
rated input voltage. This is expressed by a coefficient r (typically, r = 0.01 to 0.1):
C_in =
I _rms
2π ⋅ ƒ_sw ⋅ r ⋅ V_{irms (min)}
High values of Cin alleviate the burden to the EMI filter but cause the power factor and the harmonic con-
tents of the mains current to worsen, especially at high line and light load. On the other hand, low values of
Cin improve power factor and reduce mains current distortion but require heavier EMI filtering and increase
power dissipation in the input bridge. It is up to the designer to find the right trade-off in their application.
Output Capacitor
The output bulk capacitor (Co) selection depends on the DC output voltage, the admitted overvoltage,
the output power and the desired voltage ripple.
The 100 to 120Hz (twice the mains frequency) voltage ripple (∆VO= 1/2 ripple peak-to-peak value) is a
function of the capacitor impedance and the peak capacitor current (IC(2f)pk = Io):
√ ∆V_O = I_O ⋅
(2π
⋅
1
2f ⋅
C_O)
2
+
ESR²
With a low ESR capacitor the capacitive reactance is dominant, therefore:
C_O ≥
I_O
=
P_O
4π ⋅ f ⋅ ∆V_O 4π ⋅ f ⋅ V_O ⋅ ∆V_O
∆Vo is usually selected in the range of 1 to 5% of the output voltage.
Although ESR usually does not affect the output ripple, it has to be taken into account for power losses
calculation. The total RMS capacitor ripple current, including mains frequency and switching frequency
components, is:
√ I_Crms =
32 √²
9π
⋅
I
2
rms
⋅
V_irms
V_o
−I
2
o
If the application has to guarantee a specified hold-up time, the selection criterion of the capacitance will
change: Co has to deliver the output power for a certain time (tHold) with a specified maximum dropout voltage:
C_O
=
V
2 ⋅ P_O
2
o_min
−
⋅ t_Hold
V
2
op_min
where Vo_min is the minimum output voltage value (which takes load regulation and output ripple into
account) and Vop_min is the minimum output operating voltage before the ’power fail’ detection from the
downstream system supplied by the PFC.
Boost Inductor
Designing the boost inductor involves several parameters and different approaches can be used.
First, the inductance value must be defined. The inductance (L) is usually determined so that the mini-
mum switching frequency is greater than the maximum frequency of the internal starter, to ensure a cor-
rect TM operation. Assuming unity PF, it is possible to write:
Ton
=
L
√2
⋅
⋅
I_Lpk ⋅
V_irms
sin(θ)
⋅ sin(θ)
=
L
√2
⋅
⋅
I_Lpk
V_irms
Toff
=
Vo
L ⋅ I_Lpk ⋅ sin(θ)
− √2 ⋅ V_irms ⋅ sin(θ)
9/21