AN966 Datasheet, PDF (8/21 Pages) STMicroelectronics – The front-end stage of conventional off-line converters

AN966 APPLICATION NOTE
rectified sinusoid. It is possible to prove also that
this operation produces a costant ON-time over
each line half-cycle (see "Boost Inductor").
Figure 10. Inductor Current waveform and
MOSFET timing
After the MOSFET has been turned off, the boost
inductor discharges its energy into the load until its
current goes to zero. The boost inductor has now
run out of energy, the drain node is floating and the
inductor resonates with the total capacitance of the
drain. The drain voltage drops rapidly below the in-
stantaneous line voltage and the signal on ZCD
drives the MOSFET on again and another conver-
sion cycle starts.
PEAK
INDUCTOR CURRENT
This low voltage across the external MOSFET at
turn-on reduces both the switching losses and the
equivalent drain capacitance energy that is dissi-
pated inside the external MOSFET.
AVERAGE
The resulting inductor current and the timing inter-
vals of the MOSFET are shown in fig. 10, where it is
also shown that, by geometric relationships, the av-
erage input current (the one which will be drawn
from the mains) is just one-half of the peak inductor
current waveform.
0
On
MOSFET Q
Off
D93IN040A
The system operates (not exactly on but very close
to) the boundary between continuous and discon-
tinuous current mode and that is why this system is called a Transition Mode PFC.
Besides the simplicity and the few external parts required, this system minimizes the inductor size due to
the low inductance value needed. On the other hand, the high current ripple on the inductor involves
high RMS current and high noise on the rectified main bus, which needs a heavier EMI filter to be re-
jected. These drawbacks limit the use of the TM PFC to lower power range applications.
Design Criteria
Here below some design criteria are described. The basic design specification concerns the following
data:
u Mains Voltage Range: Virms(min) - Virms(max)
u Regulated DC Output Voltage: Vo
u Rated Output Power: Po
u Minimum Switching Frequency: ƒsw
u Maximum Output Voltage ripple: ∆Vo
u Maximum Overvoltage admitted: ∆VOVP
For reference, it is useful to define also the following quantities:
u Expected efficiency: η
u Input Power: Pi (= Po/η)
u Maximum Mains RMS current: Irms (= Pi/Virms(min))
u Rated Output Current: Io (= Po/Vo)
POWER SECTION DESIGN
Input Bridge
The input diodes bridge can use standard slow recovery, low-cost devices. The quantities to consider
will be just the input current (Irms), the maximum peak mains voltage and the thermal data of the diodes.
Input Capacitor
The input high frequency filter capacitor (Cin) has to attenuate the switching noise due to the high fre-
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