AN966 Datasheet, PDF (12/21 Pages) STMicroelectronics – The front-end stage of conventional off-line converters

AN966 APPLICATION NOTE
where tfall is the crossover time at turn-off. At turn-on the loss is due to the discharge of the total drain
capacitance inside the MOSFET itself. In general, these losses are given by:
P_CAP
=
_3.3

⋅
C_oss
⋅
V_{D1.R5 AIN}
+
1
2
⋅
C_d
⋅
V_{D2 RAIN}^

⋅
ƒ_sw
,
where Coss is the internal drain capacitance of the MOSFET (@ VDS = 25V), Cd is the total external
drain parasitic capacitance and VDRAIN is the drain voltage at MOSFET turn-on. In practice it is possible
to give only a rough estimate of the total switching losses because both ƒsw and VDRAIN change along a
given line half-cycle. VDRAIN, in particular, is affected not only by the sinusoidal change of the input volt-
age but also by the drop due to the resonance of the boost inductor with the total drain capacitance (see
fig. 12). This causes, at low mains voltage, VDRAIN to be zero during a significant portion of each line
half-cycle. It is possible to show that "Zero-Voltage-Switching" occurs as long as the instantaneous line
voltage is less than half the output voltage.
BOOST DIODE
The boost freewheeling diode will be a fast recovery one. The value of its DC and RMS current, useful
for losses computation, are respectively:
I_Do = I_o
√ I_Drms = 2 ⋅ √2 ⋅ I_rms ⋅
4 √2
9π
⋅
V_irms
V_O
.
The conduction losses can be estimated as follows:
P_DON = V_to ⋅ I_Do + R_d ⋅ I_{D2 rms} ,
where Vto (threshold voltage) and Rd (differential resistance) are parameters of the diode.
The breakdown voltage is fixed with the same criterion as the MOSFET.
L6561 Biasing Circuitry (pin by pin)
Please, refer to the schematic circuit shown in fig. 13.
Pin 1 (INV) leads both to the inverting input of the E/A and to the OVP circuit. A resistive divider will be
connected between the regulated output voltage of the boost and the pin.
The internal reference on the non-inverting input of the E/A is 2.5V and the OVP alarm level current is
40µA. R11+ R12 and R13 will be then selected as follow:
R11 + R12
R13
=
V_O
2.5V
−1
R11
+
R12
=
∆V
40
OVP
µA
,
Pin 2 (COMP) is the output of the E/A and also one of the two inputs of the multiplier. A feedback com-
pensation network, placed between this pin and INV (1), reduces the bandwidth so to avoid the attempt
of the system to control the output voltage ripple (100-120Hz).
In the simplest case, this compensation is just a capacitor, which provides a low frequency pole as well as a
high DC gain. A simple criterion to define the capacitance value, is to to provide ~60dB attenuation at
100Hz:
C23
=
2
10
π ⋅ R7
Please refer to [1] for more information on how to compensate the E/A.
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