AN966 Datasheet, PDF (14/21 Pages) STMicroelectronics – The front-end stage of conventional off-line converters

AN966 APPLICATION NOTE
The power dissipated in Rs, is given by:
P_Rs = R_s ⋅ I_{Q2 rms} .
The internal 1.8V (max.) zener clamp on the non-inverting input of the PWM comparator sets a current
limitation threshold, so that the maximum current through Rs can be as high as:
I_Rspkmax = ^1R.8_s .
This will be the maximum inductor current as well, therefore one must make sure that the boost inductor
does not saturate at this current level, which is very likely to be reached when the boost converter is
powered on (especially at low line) or powered off.
Pin 5 Pin 5 (ZCD) is the input to the Zero Current Detector circuit. The ZCD pin will be connected to the
auxiliary winding of the boost inductor through a limiting resistor.
The ZCD circuit is negative-going edge-triggered: when the voltage on the pin falls below 1.6 V the
PWM latch is set and the MOSFET is turned on. To do so, however, the circuit must be armed first: prior
to falling below 1.6V the voltage on pin 5 must experience a positive-going edge exceeding 2.1 V (due to
MOSFET’s turn-off).
The maximum main-to-auxiliary winding turn ratio, m, has to ensure that the voltage delivered to the pin
during MOSFET’s OFF-time is sufficient to arm the ZCD circuit. Then:
m
≤
V_o
−
√2
⋅ V_irms
2.1
(max.)
If the winding is used also for supplying the IC, the above criterion may not be compatible with the Vcc
voltage range. To solve this incompatibility the self-supply network shown in the schematic of fig. 13 can
be used. The minimum value of the limiting resistor can be found assuming 3 mA current through the pin
and considering the maximum voltage (the absolute value) across the auxiliary winding.
The actual value can be then fine-tuned trying to make the turn-on of the MOSFET occur exactly on the
valley of the drain voltage oscillation (the boost inductor, completely discharged, is ringing with the drain
Figure 12. Optimum MOSFET Turn-on
capacitance, see fig. 12). This will minimize the
power dissipation at turn-on.
V_DRAIN
V_O
V_ipk
If the pin is driven by an external signal, the
L6561 will be synchronized to (the negative-go-
ing edges of) that signal. If left floating, the
L6561 will work at the frequency of its internal
starter. Obviously, neither TM operation will take
place nor high PF will be achieved in this case,
but these characteristics can be exploited in ap-
plications other than PFC.
V_ZCD
5.7
This pin incorporates also a disable function.
The device will be shut down if the voltage on
the pin is forced externally below 150mV. To do
so, up to 10mA must be sunk from the pin. The
t
quiescent current of the IC will be reduced at
about 1.4 mA. The device will restart as the ex-
ternal pull-down is removed since an internal
150µA generator pulls up the pin.
Pin 6 (GND). This pin acts as the current return
2.1
both for the signal internal circuitry and for the
1.6
gate drive current. When layouting the printed
0.7
circuit board, these two paths should run sepa-
D97IN678A
t ^rately.
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