RM0366 Datasheet, PDF (820/868 Pages) STMicroelectronics – This reference manual targets application developers

RM0366
Serial peripheral interface / inter-IC sound (SPI/I2S)
Bit 10 RXONLY: Receive only mode enabled.
This bit enables simplex communication using a single unidirectional line to receive data
exclusively. Keep BIDIMODE bit clear when receive only mode is active.This bit is also useful
in a multislave system in which this particular slave is not accessed, the output from the
accessed slave is not corrupted.
0: Full duplex (Transmit and receive)
1: Output disabled (Receive-only mode)
Note: This bit is not used in I²S mode.
Bit 9 SSM: Software slave management
When the SSM bit is set, the NSS pin input is replaced with the value from the SSI bit.
0: Software slave management disabled
1: Software slave management enabled
Note: This bit is not used in I²S mode and SPI TI mode.
Bit 8 SSI: Internal slave select
This bit has an effect only when the SSM bit is set. The value of this bit is forced onto the NSS
pin and the I/O value of the NSS pin is ignored.
Note: This bit is not used in I²S mode and SPI TI mode.
Bit 7 LSBFIRST: Frame format
0: data is transmitted / received with the MSB first
1: data is transmitted / received with the LSB first
Note: 1. This bit should not be changed when communication is ongoing.
2. This bit is not used in I²S mode and SPI TI mode.
Bit 6 SPE: SPI enable
0: Peripheral disabled
1: Peripheral enabled
Note: When disabling the SPI, follow the procedure described in Procedure for disabling the
SPI on page 786.
This bit is not used in I²S mode.
Bits 5:3 BR[2:0]: Baud rate control
000: f_PCLK/2
001: f_PCLK/4
010: f_PCLK/8
011: f_PCLK/16
100: f_PCLK/32
101: f_PCLK/64
110: f_PCLK/128
111: f_PCLK/256
Note: These bits should not be changed when communication is ongoing.
This bit is not used in I²S mode.
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