STD3LN80K5 Datasheet, PDF (8/15 Pages) STMicroelectronics – Ultra-low gate charge

Test circuits
STD3LN80K5
3
Test circuits
Figure 14: Test circuit for resistive load
switching times
Figure 15: Test circuit for gate charge
behavior
V_DD
RL
V_GS
pulse width
+
2200
μF
1 kΩ
I_G= CONST
2.7 kΩ
47 kΩ
100 Ω
D.U.T.
V_G
AM01469v10
Figure 16: Test circuit for inductive load
switching and diode recovery times
Figure 17: Unclamped inductive load test
circuit
Figure 18: Unclamped inductive waveform
Figure 19: Switching time waveform
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