STD3N40K3 Datasheet, PDF (7/16 Pages) STMicroelectronics – Gate charge minimized

STD3N40K3
Electrical characteristics
Figure 8. Capacitance variations
C
(pF)
Figure 9. Output capacitance stored energy
AM08998v1
Eoss
(µJ)
AM12477v1
Ciss
100
10
1
0.1
1
Coss
Crss
10
100 VDS(V)
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
100 200 300 400 VDS(V)
Figure 10. Normalized gate threshold voltage Figure 11. Normalized on-resistance vs.
vs. temperature
temperature
VGS(th)
(norm)
1.10
ID=50µA
AM12478v1
RDS(on)
(norm)
2.5
VGS=10V
ID=0.9A
AM12479v1
1.00
2.0
1.5
0.90
1.0
0.80
0.5
0.70
-75 -25
25
75 125 TJ(°C)
0
-75 -25
25
75 125 TJ(°C)
Figure 12. Source-drain diode forward
characteristics
Figure 13. Normalized BV_DSS vs. temperature
VSD
(V)
1.0
0.9
AM12480v1
TJ=-50°C
BVDSS
(norm)
1.10
ID=1mA
AM12481v1
0.8
1.05
TJ=25°C
0.7
0.6
TJ=150°C
0.5
1.00
0.95
0.4
0
0.4 0.8 1.2 1.6 ISD(A)
0.90
-75 -25
25
75
125 TJ(°C)
Doc ID 023398 Rev 1
7/16