M50FLW040A_06 Datasheet, PDF (58/64 Pages) STMicroelectronics – 4-Mbit (5 × 64 Kbyte blocks + 3 × 16 × 4 Kbyte sectors) 3-V supply Firmware Hub / low-pin count Flash memory

Flowcharts and pseudo codes
M50FLW040A, M50FLW040B
Figure 23. Quadruple Byte Program flowchart and pseudo code (A/A Mux interface
only)
Start
Write 30h
Write Address 1
& Data 1 ⁽³⁾
Write Address 2
& Data 2 ⁽³⁾
Write Address 3
& Data 3 ⁽³⁾
Quadruple Byte Program command:
– write 30h
– write Address 1 & Data 1 ⁽³⁾
– write Address 2 & Data 2 ⁽³⁾
– write Address 3 & Data 3 ⁽³⁾
– write Address 4 & Data 4 ⁽³⁾
(memory enters read status state after
the Quadruple Byte Program command)
Write Address 4
& Data 4 ⁽³⁾
Read Status
Register
NO
Suspend
NO
SR7 = 1
YES
YES
Suspend
Loop
do:
– Read Status Register
– If SR7=0 and a Program/Erase Suspend
command has been executed
– SR7 is set to 1
– Enter suspend program loop
NO
SR3 = 0
YES
VPP Invalid
Error (1, 2)
If SR3 = 1, VPP invalid error:
– error handler
NO
SR4 = 0
YES
End
Program
Error (1, 2)
If SR4 = 1, Program error:
– error handler
AI08437B
1. A Status check of SR3 (V_PP invalid) and SR4 (Program Error) can be made after each Program operation
by following the correct command sequence.
2. If an error is found, the Status Register must be cleared before further Program/Erase Controller
operations.
3. Address1, Address 2, Address 3 and Address 4 must be consecutive addresses differing only for address
bits A0 and A1.
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