M50FLW040A_06 Datasheet, PDF (1/64 Pages) STMicroelectronics – 4-Mbit (5 × 64 Kbyte blocks + 3 × 16 × 4 Kbyte sectors) 3-V supply Firmware Hub / low-pin count Flash memory

M50FLW040A
M50FLW040B
4-Mbit (5 × 64 Kbyte blocks + 3 × 16 × 4 Kbyte sectors)
3-V supply Firmware Hub / low-pin count Flash memory
Feature summary
■ Flash memory
– Compatible with either the LPC interface or
the FWH interface (Intel Spec rev1.1) used
in PC BIOS applications
– 5 Signal Communication Interface
supporting Read and Write Operations
– 5 Additional General Purpose Inputs for
platform design flexibility
– Synchronized with 33MHz PCI clock
■ 8 blocks of 64 Kbytes
– 5 blocks of 64 KBytes each
– 3 blocks, subdivided into 16 uniform
sectors of 4 KBytes each
Two blocks at the top and one at the bottom
(M50FLW040A)
One block at the top and two at the bottom
(M50FLW040B)
■ Enhanced security
– Hardware Write Protect Pins for Block
Protection
– Register-based Read and Write Protection
■ Supply voltage
– V_CC = 3 to 3.6V for Program, Erase and
Read Operations
– V_PP = 12V for Fast Program and Erase
■ Two interfaces
– Auto Detection of Firmware Hub (FWH) or
Low Pin Count (LPC) Memory Cycles for
Embedded Operation with PC Chipsets
– Address/Address Multiplexed (A/A Mux)
Interface for programming equipment
compatibility.
■ Programming time: 10 µs typical
■ Program/Erase Controller
– Embedded Program and Erase algorithms
– Status Register Bits
PLCC32 (K)
TSOP32 (NB)
8 x 14mm
TSOP40 (N)
10 x 20mm
■ Program/Erase Suspend
– Read other Blocks/Sectors during Program
Suspend
– Program other Blocks/Sectors during Erase
Suspend
■ Electronic signature
– Manufacturer Code: 20h
– Device Code (M50FLW040A): 08h
– Device Code (M50FLW040B): 28h
■ Packages
– ECOPACK® (RoHS compliant)
October 2006
Rev 6
1/64
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