STM32L433XX Datasheet, PDF (52/225 Pages) STMicroelectronics – Ultra-low-power Arm® Cortex®-M4 32-bit MCU+FPU, 100DMIPS, up to 256KB Flash, 64KB SRAM, USB FS, LCD, ext. SMPS

Functional overview
STM32L433xx
Table 13. SAI implementation
SAI features
I2S, LSB or MSB-justified, PCM/DSP, TDM, AC’97
Mute mode
Stereo/Mono audio frame capability.
16 slots
Data size configurable: 8-, 10-, 16-, 20-, 24-, 32-bit
FIFO Size
SPDIF
1. X: supported
Support⁽¹⁾
X
X
X
X
X
X (8 Word)
X
3.30
Single wire protocol master interface (SWPMI)
The Single wire protocol master interface (SWPMI) is the master interface corresponding to
the Contactless Frontend (CLF) defined in the ETSI TS 102 613 technical specification. The
main features are:
• full-duplex communication mode
• automatic SWP bus state management (active, suspend, resume)
• configurable bitrate up to 2 Mbit/s
• automatic SOF, EOF and CRC handling
SWPMI can be served by the DMA controller.
3.31
Controller area network (CAN)
The CAN is compliant with specifications 2.0A and B (active) with a bit rate up to 1 Mbit/s. It
can receive and transmit standard frames with 11-bit identifiers as well as extended frames
with 29-bit identifiers. It has three transmit mailboxes, two receive FIFOs with 3 stages and
14 scalable filter banks.
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DocID028794 Rev 3