STM32L433XX Datasheet, PDF (168/225 Pages) STMicroelectronics – Ultra-low-power Arm® Cortex®-M4 32-bit MCU+FPU, 100DMIPS, up to 256KB Flash, 64KB SRAM, USB FS, LCD, ext. SMPS

Electrical characteristics
STM32L433xx
Table 81. DAC characteristics⁽¹⁾ (continued)
Symbol
Parameter
Conditions
Min Typ
Max Unit
DAC output
No load, middle
code (0x800)
-
185
240
buffer ON
No load, worst code
(0xF1C)
-
340
400
I_DDV(DAC)
DAC consumption from
V_REF+
DAC output No load, middle
buffer OFF code (0x800)
Sample and hold mode, buffer ON,
C_SH = 100 nF, worst case
-
155
205
185 ₓ 400 ₓ µA
-
Ton/(Ton Ton/(Ton
+Toff) +Toff)
(4)
(4)
155 ₓ 205 ₓ
Sample and hold mode, buffer OFF,
C_SH = 100 nF, worst case
-
Ton/(Ton Ton/(Ton
+Toff)
(4)
+Toff)
(4)
1. Guaranteed by design.
2. In buffered mode, the output can overshoot above the final value for low input code (starting from min value).
3. Refer to Table 70: I/O static characteristics.
4. Ton is the Refresh phase duration. Toff is the Hold phase duration. Refer to RM0394 reference manual for more details.
Figure 32. 12-bit buffered / non-buffered DAC
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1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly
without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the
DAC_CR register.
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