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STD2N105K5 Datasheet, PDF (5/21 Pages) STMicroelectronics – Ultra low gate charge
STD2N105K5, STP2N105K5, STU2N105K5
Electrical characteristics
Table 6. Switching times
Symbol
Parameter
Test conditions
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
VDD = 525 V, ID = 0.75 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 17)
Min. Typ. Max Unit
- 14.5 - ns
- 8.5 - ns
- 35 - ns
- 38.5 - ns
Symbol
Table 7. Source drain diode
Parameter
Test conditions
Min. Typ. Max Unit
ISD
ISDM (1)
VSD (2)
Source-drain current
Source-drain current (pulsed)
Forward on voltage
ISD = 1.5 A, VGS = 0
-
1.5 A
-
6A
-
1.5 V
trr
Reverse recovery time
ISD = 1.5 A, di/dt = 100 A/µs - 326
ns
Qrr Reverse recovery charge
VDD= 60 V
- 1.19
µC
IRRM Reverse recovery current
(see Figure 19)
- 7.3
A
trr
Reverse recovery time
ISD = 1.5 A, di/dt = 100 A/µs - 525
ns
Qrr Reverse recovery charge
VDD= 60 V TJ = 150 °C
- 1.83
µC
IRRM Reverse recovery current
(see Figure 19)
-7
A
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Table 8. Gate-source Zener diode
Symbol
Parameter
Test conditions
Min Typ. Max. Unit
V(BR)GSO Gate-source breakdown voltage IGS = ± 1mA, ID=0
30 -
-
V
The built-in back-to-back Zener diodes have specifically been designed to enhance the
device's ESD capability. In this respect the Zener voltage is appropriate to achieve an
efficient and cost-effective intervention to protect the device's integrity. These integrated
Zener diodes thus avoid the usage of external components.
DocID026321 Rev 3
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