STD2N105K5 Datasheet, PDF (3/21 Pages) STMicroelectronics – Ultra low gate charge

STD2N105K5, STP2N105K5, STU2N105K5
1
Electrical ratings
Electrical ratings
Table 2. Absolute maximum ratings
Symbol
Parameter
V_GS
I_D
I_D
I_DM(1)
P_TOT
I_AR
E_AS
dv/dt ⁽²⁾
dv/dt⁽³⁾
Gate- source voltage
Drain current (continuous) at T_C = 25 °C
Drain current (continuous) at T_C = 100 °C
Drain current (pulsed)
Total dissipation at T_C = 25 °C
Max current during repetitive or single pulse avalanche
Single pulse avalanche energy
(starting T_J = 25 °C, I_D=0.5 A, V_DD= 50 V)
Peak diode recovery voltage slope
MOSFET dv/dt ruggedness
T_j
Operating junction temperature
T_stg
Storage temperature
1. Pulse width limited by safe operating area.
2. I_SD ≤ 1.5 A, di/dt ≤ 100 A/µs, V_DS(peak) ≤ V_(BR)DSS.
3. V_DS ≤ 840 V
Value
±30
1.5
0.95
6
60
0.5
90
4.5
50
-55 to 150
Unit
V
A
A
A
W
A
mJ
V/ns
V/ns
°C
Symbol
R_thj-case
R_thj-amb
Table 3. Thermal data
Parameter
Thermal resistance junction-case max
Thermal resistance junction-ambient max
Value
2.08
62.50
Unit
°C/W
°C/W
DocID026321 Rev 3
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