STB27NM60ND Datasheet, PDF (5/19 Pages) STMicroelectronics – Low input capacitance and gate charge

STB27NM60ND, STW27NM60ND
Electrical characteristics
Table 6. Dynamic (continued)
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
Q_g Total gate charge
Q_gs Gate-source charge
Q_gd Gate-drain charge
V_DD = 480 V, I_D = 21 A,
V_GS = 10 V,
(see Figure 17)
-
80
- nC
-
15
- nC
-
40
- nC
R_g Gate input resistance
f = 1 MHz, gate DC
Bias = 0,
test signal level = 20 mV,
I_D = 0
-
1.6
-
Ω
1. Pulsed: pulse duration=300µs, duty cycle 1.5%
2. C_{oss eq}. is defined as a constant equivalent capacitance giving the same charging time as C_oss when V_DS
increases from 0 to 80% V_DSS
DocID15406 Rev 4
5/19
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