STDLED623 Datasheet, PDF (4/18 Pages) STMicroelectronics – Very low intrinsic capacitance

Electrical characteristics
2
Electrical characteristics
STDLED623, STULED623
(T_C = 25 °C unless otherwise specified)
Table 5. On/off states
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
V_(BR)DSS
Drain-source
breakdown voltage
I_D = 1 mA, V_GS = 0
620
V
I_DSS
t(s) ^IGSS
c _VGS(th)
rodu ^RDS(on)
Zero gate voltage
V_DS = 620 V
drain current (V_GS = 0) V_DS = 620 V, T_C = 125 °C
Gate-body leakage
current (V_DS = 0)
V_GS = ± 20 V
Gate threshold voltage V_DS = V_GS, I_D = 50 µA
Static drain-source on-
resistance
V_GS = 10 V, I_D = 1.1 A
1 µA
50 µA
± 10 µA
3
3.6 4.5 V
3
3.6 Ω
olete ^P _Symbol
Parameter
bs _Ciss
- ^{O C}_oss
t(s) ^Crss
duc ^Co(tr)(1)
Pro _RG
lete^Qg
o _Qgs
Obs ^Qgd
Input capacitance
Output capacitance
Reverse transfer
capacitance
Equivalent
capacitance time
related
Intrinsic gate
resistance
Total gate charge
Gate-source charge
Gate-drain charge
Table 6. Dynamic
Test conditions
Min.
-
V_DS = 50 V, f = 1 MHz, V_GS = 0 ^-
-
Typ.
350
27
4.4
Max. Unit
- pF
- pF
- pF
V_GS = 0, V_DS = 0 to 496 V
f = 1 MHz open drain
V_DD = 496 V, I_D = 2.7 A,
V_GS = 10 V
(see Figure 16)
-
17
- pF
-
5
-
Ω
-
15.5
- nC
-
3.2
- nC
-
9.8
- nC
1. Time related is defined as a constant equivalent capacitance giving the same charging time as C_oss when
V_DS increases from 0 to 80% V_DSS.
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