STD9N65M2 Datasheet, PDF (4/23 Pages) STMicroelectronics – Extremely low gate charge

Electrical characteristics
STD9N65M2, STF9N65M2, STP9N65M2, STU9N65M2
2
Electrical characteristics
(T_C = 25 °C unless otherwise specified)
Symbol
Parameter
Table 5. On /off states
Test conditions
V_(BR)DSS
Drain-source
breakdown voltage
V_GS = 0, I_D = 1 mA
I_DSS
I_GSS
Zero gate voltage
drain current
Gate-body leakage
current
V_GS = 0, V_DS = 650 V
V_GS = 0, V_DS = 650 V,
T_C=125 °C
V_DS = 0, V_GS = ± 25 V
V_GS(th)
R_DS(on)
Gate threshold voltage V_DS = V_GS, I_D = 250 µA
Static drain-source
on-resistance
V_GS = 10 V, I_D = 2.5 A
Min. Typ. Max. Unit
650
V
1 µA
100 µA
±10 µA
2
3
4
V
0.79 0.9 Ω
Symbol
Parameter
Table 6. Dynamic
Test conditions
Min. Typ. Max. Unit
C_iss
C_oss
C_rss
Input capacitance
Output capacitance
Reverse transfer
capacitance
V_DS = 100 V, f = 1 MHz,
V_GS = 0
-
315
- pF
-
18
- pF
-
1
- pF
C_oss
(1)
eq
Equivalent output
capacitance
V_GS = 0, V_DS = 0 to 520 V
-
109
- pF
R_G
Intrinsic gate
resistance
f = 1 MHz open drain
-
6.6
-
Ω
Q_g Total gate charge
V_DD = 520 V, I_D = 5 A,
Q_gs Gate-source charge V_GS = 10 V
Q_gd Gate-drain charge
(see Figure 19)
-
10
- nC
-
2.5
- nC
-
5
- nC
1. _{Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80%}
VDSS
Symbol
Parameter
t_d(on)
t_r
t_d(off)
t_f
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 7. Switching times
Test conditions
V_DD = 325 V, I_D = 2.5 A,
R_G = 4.7 Ω, V_GS = 10 V
(see Figure 18 and Figure 23)
Min.
-
-
-
-
Typ.
7.5
6.6
22.5
18
Max. Unit
-
ns
-
ns
-
ns
-
ns
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DocID025975 Rev 2