STD9N40M2 Datasheet, PDF (4/16 Pages) STMicroelectronics – Low gate input resistance

Electrical characteristics
2
Electrical characteristics
STD9N40M2
(T_C = 25 °C unless otherwise specified)
Symbol
Parameter
Table 5. On /off states
Test conditions
Drain-source
V_{(BR)DSS breakdown voltage}
V_GS = 0, I_D = 1 mA
Zero gate voltage
I_DSS
drain current
I_GSS
Gate-body leakage
current
V_GS = 0, V_DS = 400 V
V_GS = 0, V_DS = 400 V,
T_C=125 °C
V_DS = 0, V_GS = ± 25 V
V_GS(th)
R_DS(on)
Gate threshold voltage V_DS = V_GS, I_D = 250 μA
Static drain-source
on-resistance
V_GS = 10 V, I_D = 3 A
Min. Typ. Max. Unit
400
V
1 μA
100 μA
±10 μA
2
3
4V
0.59 0.8 Ω
Symbol
Parameter
Table 6. Dynamic
Test conditions
Min. Typ. Max. Unit
C_iss
C_oss
C_rss
Input capacitance
Output capacitance
Reverse transfer
capacitance
V_GS = 0, V_DS = 100 V,
f = 1 MHz
- 270 - pF
-
22
- pF
-
0.7
- pF
(1) ^{Equivalent output}
C_{oss eq. capacitance}
V_GS = 0, V_DS = 0 to 320 V
-
94
- pF
Intrinsic gate
R_{G resistance}
f = 1 MHz, I_D=0
-
7.1
-
Ω
Q_g Total gate charge
V_DD = 320 V, I_D = 6 A,
Q_gs Gate-source charge V_GS = 10 V
Q_gd Gate-drain charge
(see Figure 15)
-
8.8
- nC
-
1.7
- nC
-
4.8
- nC
1. C_{oss eq.} is defined as a constant equivalent capacitance giving the same charging time as C_oss when V_DS
increases from 0 to 80% V_DSS
Symbol
Parameter
t_d(on)
t_r
t_d(off)
t_f
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 7. Switching times
Test conditions
V_DD = 200 V, I_D = 3 A,
R_G = 4.7 Ω, V_GS = 10 V
(see Figure 14 and 19)
Min. Typ. Max. Unit
- 10.5 - ns
-
9
- ns
-
7.5
- ns
-
21
- ns
4/16
DocID025752 Rev 2