English
Language : 

STD9N40M2 Datasheet, PDF (3/16 Pages) STMicroelectronics – Low gate input resistance
STD9N40M2
1
Electrical ratings
Electrical ratings
Symbol
Table 2. Absolute maximum ratings
Parameter
VDS
VGS
ID
ID
(1)
IDM
PTOT
(1)
dv/dt
(2)
dv/dt
Drain-source voltage
Gate-source voltage
Drain current (continuous) at TC = 25 °C
Drain current (continuous) at TC = 100 °C
Drain current (pulsed)
Total dissipation at TC = 25 °C
Peak diode recovery voltage slope
MOSFET dv/dt ruggedness
Tstg Storage temperature
Tj
Max. operating junction temperature
1. ISD ≤ 6 A, di/dt ≤ 400 A/μs; VDS peak < V(BR)DSS, VDD=320 V
2. VDS ≤ 320 V
Value
400
± 25
6
3.8
24
60
15
50
- 55 to 150
Symbol
Table 3. Thermal data
Parameter
Rthj-case Thermal resistance junction-case max
(1)
Rthj-pcb Thermal resistance junction-pcb max
1. When mounted on 1 inch² FR-4, 2 Oz copper board
Value
2.08
50
Symbol
Table 4. Avalanche characteristics
Parameter
Avalanche current, repetitive or not repetitive
IAR (pulse width limited by Tjmax)
EAS
Single pulse avalanche energy (starting Tj=25°C,
ID= IAR, VDD=50)
Value
2.5
148
Unit
V
V
A
A
A
W
V/ns
°C
Unit
°C/W
°C/W
Unit
A
mJ
DocID025752 Rev 2
3/16
16