ESDAULC6-3BP6 Datasheet, PDF (4/11 Pages) STMicroelectronics – ESD protection for high speed interface

Characteristics
ESDAULC6-3BP6, ESDAULC6-3BF2
Figure 9.
C(pF)
1
Junction capacitance versus
reverse voltage applied (typical
values) (SOT-666)
F=1MHz
VOSC=30mVRMS
Tj=25°C
Figure 10. Junction capacitance versus
reverse voltage applied (typical
values) (Flip-Chip)
C(pF)
2
F=1MHz
V_OSC=30mV_RMS
T_j=25°C
1
VLINE(V)
V_LINE(V)
0
0
0
1
2
3
4
5
0
1
2
3
4
5
Figure 11.
Relative variation of leakage
current versus junction
temperature (typical values)
(SOT-666)
IR[Tj] / IR[Tj=25°C]
100
VR=5V
Figure 12.
Relative variation of leakage
current versus junction
temperature (typical values)
(Flip-Chip)
I_R [T_j] / I_R [T_j=25°C]
100
V_R =5V
10
10
Tj(°C)
1
1
25
50
75
100
125
150
25
T_j(°C)
50
75
100
125
Figure 13.
Remaining voltage after
ESDAULC6-3BP6 during ESD
15 kV positive surge (air
discharge) (SOT-666)
Figure 14.
Remaining voltage after
ESDAULC6-3BF2 during ESD
15 kV positive surge (air
discharge) (Flip-Chip)
4/11
0.1 µs/div
0.1 µs/div