STDVE103A Datasheet, PDF (39/43 Pages) STMicroelectronics – Adaptive 3.4 Gbps 3:1 TMDS/HDMI signal equalizer

STDVE103A
Application information
6.3.1
I²C lines application information
A typical application is shown in the figure below. In the example, the system master is
running on a 3.3 V I²C-bus while the slave is connected to a 5 V bus. Both buses run at
100 kHz unless the slave bus is isolated and then the master bus can run at 400 kHz.
Master devices can be placed on either bus.
Figure 20. Typical application of I²C bus system
3.3V
5.0V
SDA
SCL
Bus Master
400 kHz
SHDN_N
SDA
SDA
SCL
SCL
STDVE103A
SEL
SDA
SCL
Slave
100 kHz
BUS 0
BUS 1
AM00712V1
The STDVE103A DDC lines are 5 V tolerant; so it does not require any extra circuitry to
translate between the different bus voltages.
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