STDVE103A Datasheet, PDF (15/43 Pages) STMicroelectronics – Adaptive 3.4 Gbps 3:1 TMDS/HDMI signal equalizer

STDVE103A
Functional description
4.2
4.2.1
Operating modes
SEL operating modes
The active source is selected by configuring source select inputs, S1 and S2. The selected
TMDS inputs from each port are switched through a 3-to-1 multiplexer. The I²C interface of
the selected input port is linked to the I²C interface of the output port, and the hot plug
detector (HPD) of the selected input port is output to HPD_SINK.
Table 4.
SEL operating modes
Control pins
I/O selected
Hot-plug detect status
S2
S1
Y/Z
SCL_SINK
SDA_SINK
HPD1
HPD2
HPD3
A1/B1 terminations
SCL1
H
H of A2/B2 and A3/B3
HPD_SINK
L
L
are disconnected
SDA1
A2/B2 terminations
H
L of A1/B1 and A3/B3
are disconnected
SCL2
SDA2
L
HPD_SINK
L
A3/B3 terminations
L
L of A1/B1 and A2/B2
are disconnected
SCL3
SDA3
L
L
HPD_SINK
None (Z).
None (Z)
L
H
All terminations are
disconnected
Are pulled high by
external pullup
termination
L
L
L
H: logic high; L: logic low; X: don't care; Z: high impedance
4.3
HPD pins
The input pin HPD_SINK is 5 V tolerant, allowing direct connection to 5 V signals. The
switch is able to pass both 0 V and 5 V signal levels. The HPD_SINK is an input pin while
the HPD1, HPD2 and HPD3 are outputs.
4.4
DDC channels
The DDC channels are designed with a bi-directional NMOS gate, providing 5 V signal
tolerance. The 5 V tolerance allows direct connection to a standard I²C bus, thus eliminating
the need for a level shifter. There should be external pull-up resistors on either side of the
device on both the SCL and SDA lines.
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