STDVE103A Datasheet, PDF (10/43 Pages) STMicroelectronics – Adaptive 3.4 Gbps 3:1 TMDS/HDMI signal equalizer

Pin configuration
STDVE103A
Table 2. Pin description (continued)
Pin number
Pin name
Type
Function
16
17-18
19
20-21
22
23-24
25
26-27
28
29
30
R_EXT
Y4, Z4
V_CC
Y3, Z3
GND
Y2, Z2
V_CC
Y1, Z1
GND
SCL_SINK
SDA_SINK
Analog
Output,
TMDS
Power
Output,
TMDS
Power
Output,
TMDS
Power
Output,
TMDS
Power
I/O
I/O
Connect to GND through a 4.7 K ± 1% precision
reference resistor. Sets the output current to
generate the output voltage compliant with TMDS
Channel 4 differential outputs
Supply voltage (3.3 V ± 5%)
Channel 3 differential outputs
Ground
Channel 2 differential outputs
Supply voltage (3.3 V ± 5%)
Channel 1 differential outputs
Ground
Sink side DDC bus clock line
Sink side DDC bus data line
31
32-33
34
HPD_SINK
S1,S2
NC
Input
Input
Sink side hot plug detector input
High: 5 V power signal asserted from source to
sink and EDID is ready
Low: No 5 V power signal is asserted from source
to sink or EDID is not ready
Source select inputs
No connect
35
36
37
38-39
40
41-42
43
44-45
46
47-48
49
HPD1
SDA1
SCL1
B11, A11
V_CC
B12, A12
GND
B13, A13
V_CC
B14, A14
V_DD
Output Port 1 hot plug detector output.
I/O
Port 1 DDC bus data line
I/O
Port 1 DDC bus clock line
Input, TMDS Port 1 differential inputs for channel 1
Power Supply voltage (3.3 V ± 5%)
Input, TMDS Port 1 differential inputs for channel 2
Power Ground
Input, TMDS Port 1 differential inputs for channel 3
Power Supply voltage (3.3 V ± 5%)
Input, TMDS Port 1 differential inputs for channel 4
Power
Supply voltage (5.0 V ± 10%) for DDC, HPD and
source selector pins
50
HPD2
Output Port 2 hot plug detector output
51
SDA2
I/O
Port 2 DDC bus data line
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