RM0319 Datasheet, PDF (37/368 Pages) STMicroelectronics – SPEAr320S architecture and functionality

RM0319
5.4
Hardware overview
Figure 6. Hardware memory
SPEAr320S
D2800000h
Shadow
Memory
ARM
eSRAM
FF00.0000h
High Vectors
Boot ROM
eROM
NAND/
NOR
FLASHES
Power On Reset
SDRAM
(DDR2)
BootROM
5.4.1
5.4.2
5.4.3
eROM (Embedded ROM)
eROM is the 32KB of area starting from 0xFFFF_0000. The ARM processor is mapped to
HIGH vectors and starts executing instructions from 0xFFFF_0000.
Shadow memory
Shadow memory is the area where BootROM copies the X-Loader after reading/receiving
from any of the booting processes. Address where X-Loader is copied in the shadow
memory is specified in the X-Loader header.
System controller
The system controller is used to program/control the system clock mode and frequency.
After reset, the system is set to DOZE mode.
BootROM configures the system in different modes depending on different booting types:
● For serial NOR, parallel NOR, 8/16-bit NAND, UART0 and BootROM bypass booting:
SLOW mode (CPU 24 MHz - AHB 24 MHz)
● For Ethernet and USB booting: NORMAL mode (CPU 333 MHz - AHB 166 MHz)
Doc ID 022640 Rev 3
37/368