RM0319 Datasheet, PDF (316/368 Pages) STMicroelectronics – SPEAr320S architecture and functionality

System controller (SYSCTR)
29.3
Functional description
Figure 106. System controller block diagram
nPOR
SCLK
PRESETn
PENABLE
PSEL
PWRITE
PWDATA[31:0]
PADDR[11:2]
PLLON
PLLSW
PLLTIMEEN
XTALON
XTALSW
XTALTIMEEN
Clock and reset
inputs
APB interface
PLL oscillator
control and status
Crystal oscillator
control and status
PERIPHCLKSTAT[31:0]
REDCLK
TIMCLK
WDEN
Clock control and
status
SYSSTAT[31:0]
REMAPSTAT
nIRQ
STANDBYWFI
nFIQ
SYSID[31:0]
SCANENABLE
SCANINSCLK
System control
and status
Scan test interface
RM0319
PRDATA[31:0]
PLLEN
PLLRQSW
PLLFREQCTRL[31:0]
XTALEN
XTALRQSW
PERIPHCLKEN[31:0]
HCLKDIVSEL[2:0]
PERIPHCTRL0[31:0]
PERIPHCTRL1[31:0]
SLEEPMODE
TIMERCLKEN0
TIMERCLKEN1
TIMERCLKEN2
TIMERCLKEN3
WDCLKEN
REMAPCLEAR
SOFTRESREQ
SYSMODE[3:0]
SCANOUTSCLK
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Doc ID 022640 Rev 3