STM32F303RD Datasheet, PDF (31/184 Pages) STMicroelectronics – Reset and supply management

STM32F303xD STM32F303xE
Functional overview
3.23
Serial peripheral interface (SPI)/Inter-integrated sound
interfaces (I2S)
Up to four SPIs are able to communicate up to 18 Mbit/s in slave and master modes in full-
duplex and half-duplex communication modes. The 3-bit prescaler gives 8 master mode
frequencies and the frame size is configurable from 4 bits to 16 bits.
Two standard I2S interfaces (multiplexed with SPI2 and SPI3) supporting four different
audio standards can operate as master or slave at half-duplex and full duplex
communication modes. They can be configured to transfer 16 and 24 or 32 bits with 16-bit
or 32-bit data resolution and synchronized by a specific signal. Audio sampling frequency
from 8 kHz up to 192 kHz can be set by 8-bit programmable linear prescaler. When
operating in master mode it can output a clock for an external audio component at 256 times
the sampling frequency.
Refer to Table 9 for the features available in SPI1, SPI2, SPI3 and SPI4.
Table 9. STM32F303xD/E SPI/I2S implementation
SPI features⁽¹⁾
SPI1
SPI2
Hardware CRC calculation
Rx/Tx FIFO
NSS pulse mode
X
X
X
X
X
X
I2S mode
TI mode
-
X
X
X
1. X = supported.
SPI3
X
X
X
X
X
SPI4
X
X
X
-
X
3.24
Controller area network (CAN)
The CAN is compliant with specifications 2.0A and B (active) with a bit rate up to 1 Mbit/s. It
can receive and transmit standard frames with 11-bit identifiers as well as extended frames
with 29-bit identifiers. It has three transmit mailboxes, two receive FIFOs with 3 stages and
14 scalable filter banks.
3.25
Universal serial bus (USB)
The STM32F303xD/E embeds a full-speed USB device peripheral compliant with the USB
specification version 2.0. The USB interface implements a full-speed (12 Mbit/s) function
interface with added support for USB 2.0 Link Power Management. It has software-
configurable endpoint setting with packet memory up-to 1 Kbyte (256 bytes are used for
CAN peripheral if enabled) and suspend/resume support.
The dedicated 48 MHz clock is generated from the internal main PLL (the clock source must
use a HSE crystal oscillator).
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