STM32F303RD Datasheet, PDF (100/184 Pages) STMicroelectronics – Reset and supply management

Electrical characteristics
STM32F303xD STM32F303xE
Table 44. Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings⁽¹⁾
Symbol
Parameter
Min
Max
Unit
t_w(NE)
t_{v(NOE_NE)}
t_w(NOE)
t_{h(NE_NOE)}
FMC_NE low time
FMC_NEx low to FMC_NOE low
FMC_NOE low time
FMC_NOE high to FMC_NE high hold
time
2THCLK– 1
0
2THCLK
2THCLK+1
1
2THCLK+ 1.5
0.5
-
t_{v(A_NE)}
FMC_NEx low to FMC_A valid
-
3
t_{h(A_NOE)}
Address hold time after FMC_NOE high
0
-
t_{v(BL_NE)}
FMC_NEx low to FMC_BL valid
-
2 (NA)
ns
t_{h(BL_NOE)}
FMC_BL hold time after FMC_NOE high
0
-
t_{su(Data_NE)}
Data to FMC_NEx high setup time
THCLK + 6
-
t_{su(Data_NOE)} Data to FMC_NOEx high setup time
THCLK +7
-
t_{h(Data_NOE)} Data hold time after FMC_NOE high
0
-
t_{h(Data_NE)}
Data hold time after FMC_NEx high
0
-
t_{v(NADV_NE)} FMC_NEx low to FMC_NADV low
-
2
t_w(NADV)
FMC_NADV low time
-
THCLK +1.5
1. Based on characterization, not tested in production
Table 45. Asynchronous non-multiplexed SRAM/PSRAM/NOR read-NWAIT timings⁽¹⁾
Symbol
Parameter
Min
Max
Unit
t_w(NE)
FMC_NE low time
7THCLK +0.5 7THCLK+ 1
t_w(NOE)
FMC_NWE low time
6THCLK -1.5 6THCLK +2
ns
t_{su(NWAIT_NE)} FMC_NWAIT valid before FMC_NEx high 4THCLK +5
-
t_{h(NE_NWAIT)}
FMC_NEx hold time after FMC_NWAIT
invalid
4THCLK-3
-
1. Based on characterization, not tested in production
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