STM32F303RD Datasheet, PDF (133/184 Pages) STMicroelectronics – Reset and supply management

STM32F303xD STM32F303xE
Electrical characteristics
Table 70. IWDG min/max timeout period at 40 kHz (LSI) ⁽¹⁾
Prescaler divider PR[2:0] bits
Min timeout (ms) RL[11:0]=
0x000
Max timeout (ms) RL[11:0]=
0xFFF
/4
0
0.1
409.6
/8
1
0.2
/16
2
0.4
/32
3
0.8
/64
4
1.6
/128
5
3.2
/256
7
6.4
819.2
1638.4
3276.8
6553.6
13107.2
26214.4
1. These timings are given for a 40 kHz clock but the microcontroller internal RC frequency can vary from 30
to 60 kHz. Moreover, given an exact RC oscillator frequency, the exact timings still depend on the phasing
of the APB interface clock versus the LSI clock so that there is always a full RC period of uncertainty.
Table 71. WWDG min-max timeout value @72 MHz (PCLK)⁽¹⁾
Prescaler
WDGTB
Min timeout value
Max timeout value
1
0
0.05687
3.6409
2
1
4
2
8
3
0.1137
0.2275
0.4551
7.2817
14.564
29.127
1. Guaranteed by design, not tested in production.
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