TDA7500 Datasheet, PDF (3/14 Pages) STMicroelectronics – DIGITAL AM/FM SIGNAL PROCESSOR

PIN DESCRIPTION
N°
1 GND1
2 VDD1
3 TESTEN
NAME
4 TESTSE
5 NRESET
6 SCKM/DSP0_GPIO0
7 MISOM/DSP0_GPIO1
8 MOSIM/DSP0_GPIO2
9 SSM/DSP0_GPIO3
10 SCKD/DSP0_GPIO4
11 MISOD/DSP0_GPIO5
12 MISOD/DSP0_GPIO6
13 SSD/DSP0_GPIO7
14 CLKIN
15 AVDD
16 XTI
17 XTO
18 AGND
19 RDSINT/DSP1_GPIO4
TDA7500
TYPE
I
I
I
I/O
I/O
I/O
I
I
I/O
I/O
I
I
I
O
O
DESCRIPTION
Ground pin dedicated to the digital periphery.
Supply pin dedicated to the digital periphery.
Test Enable (Input). When active, puts the chip into test mode and
muxes the XTI clock to all flip-flops. When TEST_SE is also
active, the scan chain shifting is enabled.
SCAN Enable (Input). When active with TESTEN also active,
controls the shifting of the internal scan chains. When active with
TESTEN not active, sets all tri-state outputs into hi-impedance
mode
System Reset (Input). A low level applied to NRESET input
initializes the IC.
I²C Serial Clock Line (Input/Output)/SPI Bit Clock (Input)/General
Purpose I/O (Input/Output). Clock line for I²C bus. Schmitt trigger
input. If SPI interface is enabled, behaves as SPI bit clock.
Optionally it can be used as general purpose I/O controlled by
DSP0.
I²C Serial Data Line (Input/Output)/SPI Master Input Slave Output
Serial Data (Input/Output)/General Purpose I/O (Input/Output).
Data line for I²C bus. Schmitt trigger input. If SPI is enabled,
behaves as Serial Data Input when in SPI Master Mode and Serial
Data Output when in SPI Slave Mode. Optionally it can be used as
general purpose I/O controlled by DSP0.
SPI Master Output Slave Input Serial Data (Input/Output)/General
Purpose I/O (Input/Output). Serial Data Output when in SPI
Master Mode and Serial Data Input when in SPI Slave Mode.
Optionally it can be used as general purpose I/O controlled by
DSP0.
SPI Slave Select (Input)/General Purpose I/O (Input/Output). If SPI
is enabled, behaves as Slave Select line for SPI bus. Optionally it
can be used as general purpose I/O controlled by DSP0.
SPI Bit Clock (Input)/General Purpose I/O (Input/Output). SPI bit
clock. Schmitt trigger input. Optionally it can be used as general
purpose I/O controlled by DSP0.
SPI Master Input Slave Output Serial Data (Input/Output)/General
Purpose I/O (Input/Output). Schmitt trigger input. Behaves as
Serial Data Input when in SPI Master Mode and Serial Data
Output when in SPI Slave Mode. Optionally it can be used as
general purpose I/O controlled by DSP0.
SPI Master Output Slave Input Serial Data (Input/Output)/General
Purpose I/O (Input/Output). Serial Data Output when in SPI
Master Mode and Serial Data Input when in SPI Slave Mode.
Optionally it can be used as general purpose I/O controlled by
DSP0.
SPI Slave Select (Input)/General Purpose I/O (Input/Output).
Behaves as Slave Select line for SPI bus. Optionally it can be
used as general purpose I/O controlled by DSP0.
Clock Input pin (Input). Clock from external digital audio source to
synchronize the internal PLL.
audio source to synchronize the internal PLL.
Crystal Oscillator Input (Input). External Clock Input or crystal
Oscillator input.
Crystal Oscillator Output (Output). Crystal Oscillator output drive.
Ground pin dedicated to the PLL
RDS bit/block interrupt (Output)/General Purpose I/O
(Input/Output). Provides an interrupt to the main micro. Optionally
it can be used as general purpose I/O controlled by DSP1.
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