TDA7500 Datasheet, PDF (1/14 Pages) STMicroelectronics – DIGITAL AM/FM SIGNAL PROCESSOR

®
TDA7500
DIGITAL AM/FM SIGNAL PROCESSOR
PRODUCT PREVIEW
FULL SOFTWARE FLEXIBILITY WITH TWO
24X24 BIT DSP CORES
AM/FM PROCESSING
AUDIO-PROCESSING AND SOUND-PROC-
ESSING
HARDWARE RDS FILTER, DEMODULATOR
& DECODER
INTEGRATED CODEC
IIC AND SPI CONTROL INTERFACES
SPI DEDICATED TO DISPLAY MICRO
6 CHANNEL SERIAL AUDIO INTERFACE SAI
SPDIF RECEIVER WITH SAMPLE RATE
CONVERTER
EXTERNAL MEMORY INTERFACE
DOUBLE DEBUG INTERFACE
ON-CHIP PLL
5V-TOLERANT 3V I/O INTERFACE
MULTIFUNCTION GENERAL PURPOSE I/O PORTS
TQFP100 Power with Slug Down
DESCRIPTION
The TDA7500 is an integrated circuit implement-
ing a fully digital, integrated and advanced solu-
tion to perform the signal processing in front of
the power amplifier and behind the AM/FM tuner
or any other audio sources. The chip integrates
two 43 MIPs DSP cores: one for stereo decoding,
noise blanking, weak signal processing and multi-
BLOCK DIAGRAM
analog audio in
AM-IF
CC
CD
1
2
3
tel,navi
4
AM/FM lev.
2
3
AM/FM mpx 1
RDS mpx
Mute supply Cref
22
3
Input Multiplexer,
Analog Level Adjust
AM
Noise
Detector
IIC
2 channel analog bypass
4
VDD GND
CODEC-ref
32
VS SigGnd RefOut
Output _{Analog Volume Control,}
select. _{Line Driver}
6 _{signal/line out}
DAC-ref ₆
Σ∆ Modulator
Σ∆ Modulator
Σ∆ Modulator
Σ∆ Modulator
Decimation
Filter
Decimation
Filter
uP control
Main micro
(4
I/O's)₄
Display uP (4 I/O's)
Spectrum Analyser ⁴
CLK in ^{Audio Bus Synch.}
8.55MHz
Data, ctl
8+3
128k (4M) x 8
Address (1 I/O)
17
Audio Bus 6 ch.
dig. aud. out (2 I/O's)
clkt, wst, clkr, wsr
dig. aud. in (2 I/O's)
3
4
2
CD input
CDC input
MD input
IIC / SPI
SPI
XTAL Osc.,
PLL
Ext. Memory
Interface
Serial Audio
Interface
SPDIF
Interface
Mux
Exchange
Interface
1 stereo channel
Sample Rate
Converter
RDS bit/blk Int.(1 ^I/O)
RDS (4 I/O's) ⁴
Error corrected RDS blocks
alternatively:
RDS clk, dat, qual, ARI
SPI
RDS
Grp & blk
sync., error ^{Demod. RDS}
correction
Filter
Voltage
Ref.
Codec
Ctl Reg.
Test I/F
Oversampling
Filter
Oversampling
Filter
Oversampling
Filter
Noise
Shaper
Noise
Shaper
Noise
Shaper
SC Filter
SC Filter
SC Filter
SC Filter
SC Filter
SC Filter
X bus 1 _{X Register}
Ram 512
Y Register
Ram 512
Program
Ram 1024
Rom 256
DSP Orpheus Core
including 12 GPIO• s
FM processing,
AM processing,
Traffic mem., Dolby,
Speech synth., etc...
Debug, Test Interface
DSP1
X bus 0 _{X Register}
Ram 512
Y Register
Ram 512
Program
Ram 5632
Rom 256
DSP Orpheus Core
including 12 GPIO• s
Audio processing,
Sound processing
Debug, Test Interface
DSP0
Int
Reset
5
5
VDD
GND
2 _Test
4
4
(3 I/O's)
(3 I/O's)
September 1999
This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice.
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